preserve-emulation/ppsspp
1
0
Fork 0
mirror of https://github.com/hrydgard/ppsspp.git synced 2026-07-27 01:05:07 +02:00
Code Issues Packages Projects Releases Wiki Activity
31,301 Commits 79 Branches 131 Tags
dbfa4e6830fbb60e8d91b8ae16f7116f30291bde
Commit Graph
703 Commits
Author SHA1 Message Date
Unknown W. Brackets 3180e6c043 softgpu: Correct alpha on add + invalid texfuncs. 2021-12-05 16:28:37 -08:00
Unknown W. Brackets 325a1f75aa softgpu: Match texenv blend texfunc accurately. 2021-12-05 16:09:26 -08:00
Unknown W. Brackets 0b6e7c421f softgpu: Make decal tex func more accurate. 
Tested for all values of A * B + 0 * (255 - B), as well as A * 127 + B *
(255 - 127), and matches accurately.  Spot checked other values, but not
exhaustively.
 2021-12-05 13:34:19 -08:00
Unknown W. Brackets 154bb53744 softgpu: Correct accuracy on fast path modulate. 2021-12-05 13:10:18 -08:00
Unknown W. Brackets 73460f7461 softgpu: Correct accuracy of MODULATE texfunc. 
This matches hardware tests for every value of A * B.
Interesting that it's a different formula than alpha blend.
 2021-12-05 12:06:52 -08:00
Unknown W. Brackets 891fa8c613 softgpu: Template away uncommon mip usage. 
Improves general case about 10%.
 2021-12-04 15:45:06 -08:00
Unknown W. Brackets 48e9404419 softgpu: Remove useless switch by UV gen mode. 
They're all handled earlier now, and the switch is on a value & 3, so the
default wasn't even possible.
 2021-12-04 15:45:06 -08:00
Unknown W. Brackets ff94974df9 softgpu: Avoid texlevel check when maxlevel is 0. 2021-12-04 15:45:06 -08:00
Unknown W. Brackets 823c4adb15 softgpu: Keep arguments in vectors for sampling. 2021-12-04 15:45:06 -08:00
Unknown W. Brackets d7c25b3e7c samplerjit: Refactor nearest using reg cache. 2021-12-04 13:04:53 -08:00
Unknown W. Brackets 4aa5bee14c softjit: Make it an error to unlock a temp. 
Also fix some register usage in logic ops.
 2021-12-01 21:50:02 -08:00
Unknown W. Brackets 75a918f96f softjit: Get rid of pointless AGE00 tests. 2021-12-01 21:44:10 -08:00
Unknown W. Brackets f47fb7e14e softjit: Normalize some stencil test patterns. 2021-12-01 21:43:52 -08:00
Unknown W. Brackets ba69e39256 softjit: Avoid tests for greater than 0. 
They take more instructions, and can be somewhat common.
 2021-12-01 21:40:10 -08:00
Unknown W. Brackets aec41b34d6 softjit: Reduce ditherMatrix to 8-bit. 
Oops, not sure why I made it 16 bit.
 2021-12-01 21:39:29 -08:00
Unknown W. Brackets 1c5615624a softjit: Oops, correct allocation typo. 
Decided to leave these for paired operations.
 2021-12-01 21:37:55 -08:00
Unknown W. Brackets bfe82e417d softjit: Fix locked stencil reg. 2021-11-28 20:26:01 -08:00
Unknown W. Brackets 99c213f244 softjit: Centralize argument register allocation. 2021-11-28 15:53:24 -08:00
Unknown W. Brackets 7aea6d2ab0 softjit: Fix fog typo causing locking bug. 2021-11-28 12:26:23 -08:00
Unknown W. Brackets 9653c33d9c softjit: Fix PixelFuncID arg on non-Windows x64. 
Oops, this is of course not put on the stack, it's in R8.
 2021-11-28 08:54:36 -08:00
Unknown W. Brackets 2d8fdd8cf4 Math3D: Allow construction from NEON vectors. 
This makes it match SSE and easier to keep things generic.  Will impact
alignment of non-packed Vec2/Vec3.
 2021-11-28 08:24:53 -08:00
Unknown W. Brackets 96a7554053 sofjit: Move common types to reg cache header. 
This makes it easier to use vectors elsewhere.
 2021-11-28 08:03:15 -08:00
Unknown W. Brackets 3d5bced296 softjit: Rename reg cache so it can be reused. 
Intentionally just the name changes in this commit.
 2021-11-28 08:03:15 -08:00
Unknown W. Brackets 4703b6cb56 softjit: Cleanup, add other arch types to regcache. 2021-11-28 08:03:15 -08:00
Unknown W. Brackets c1882fa1c0 softjit: Disallow use of register after unlock. 2021-11-28 08:03:14 -08:00
Unknown W. Brackets 2f039abd13 softjit: Simplify regcache usage as purpose only. 
Dealing with types was annoying, and this helps validate the right
register is released.
 2021-11-28 08:03:14 -08:00
Unknown W. Brackets 722c04c5e2 samplerjit: Allow disabling linear too, oops. 2021-11-28 08:03:14 -08:00
Unknown W. Brackets cc099c73f1 softjit: Decide stack offset on compile. 
This makes it easier to compile different entries or push regs.
 2021-11-28 08:03:14 -08:00
Unknown W. Brackets e1ed49a3e4 softjit: Ensure all regs are released. 2021-11-28 08:03:14 -08:00
Unknown W. Brackets d53e13b862 softjit: Manage args in the register cache. 2021-11-28 08:03:13 -08:00
Unknown W. Brackets 6fbcf67093 softjit: Fix disabled cache. 2021-11-27 11:32:47 -08:00
Unknown W. Brackets 1cb48a7bd2 softjit: Reduce jit pool size a bit. 2021-11-26 10:30:00 -08:00
Unknown W. Brackets 1f9dc3a568 softjit: Precalculate write mask and dither. 
This is slightly abusing PixelFuncID, but the intent is to provide some
memory that's easily accessible from the jit func, but still associated
with that calculation (i.e. not global.)
 2021-11-26 10:12:54 -08:00
Unknown W. Brackets 4e6a5ce760 softjit: Log any failed compiles. 2021-11-26 09:30:49 -08:00
Unknown W. Brackets 446eec0dff softjit: Keep color 16-bit when useful. 
Reuse it expanded where we can, in case of dither+fog+blend, etc.
 2021-11-26 09:30:48 -08:00
Unknown W. Brackets c62457bb33 softjit: Optimize common blend inverse alpha case. 2021-11-26 09:30:48 -08:00
Unknown W. Brackets 1fa4e6ba2c softjit: Add alpha blending factors. 2021-11-26 09:30:48 -08:00
Unknown W. Brackets bc8d5ad372 softjit: Cache zero vector to avoid recreating. 2021-11-26 09:30:48 -08:00
Unknown W. Brackets a07017dbb0 softjit: Prefer easier to refill regs. 2021-11-26 09:30:47 -08:00
Unknown W. Brackets 932481d3cd softjit: Minor tweak to reg order for XCHG. 
It's easier to use it in these places, but seems it stalls longer on the
dest reg.
 2021-11-26 09:30:47 -08:00
Unknown W. Brackets 7f167c3660 softjit: Implement min/max/absdiff blending. 
Alpha not yet implemented.
 2021-11-26 09:30:47 -08:00
Unknown W. Brackets 771d459025 softjit: Use SSE4.1 for fog and dither a bit. 2021-11-26 08:42:17 -08:00
Unknown W. Brackets cf888257ab softjit: Fix dithering bug. 2021-11-26 08:21:15 -08:00
Unknown W. Brackets 3f3e0ea8cf softjit: Optimize typical alpha/depth test. 
Messed with SSE4 then realized there's no point, just use SHR.
 2021-11-26 08:21:14 -08:00
Unknown W. Brackets 6644c4225c softjit: Apply logic ops. 2021-11-26 08:21:14 -08:00
Unknown W. Brackets 961273fcf5 softjit: Apply color write mask. 2021-11-26 08:21:14 -08:00
Unknown W. Brackets a49a189962 softjit: Refactor color conv to dedicated funcs. 
Will use this for masking too.
 2021-11-26 08:21:14 -08:00
Unknown W. Brackets 2b4b4ae064 softjit: Add config setting to enable/disable. 
Also use it for samplerjit.
 2021-11-26 08:21:14 -08:00
Unknown W. Brackets edb21b57bb softjit: Initial color write. 
At this point, it's used in some areas in some games.
Alpha blending is the main unimplemented path, then logic/masking.
 2021-11-26 08:21:13 -08:00
Unknown W. Brackets 0e63b357b3 softjit: Add dithering. 2021-11-26 08:21:13 -08:00