Commit Graph
51 Commits
Author SHA1 Message Date
Henrik Rydgard 502f772856 Add experimental mode to cache pointers in the arm jit.
Turned off for now as it needs more work but seems quite promising already.
2013-11-09 17:15:30 +01:00
Henrik Rydgard dff0c431aa ARMjit: Optimize mfc1, mtc1 2013-11-08 12:43:48 +01:00
Henrik Rydgård 9be3f8fc0a Use ANDI2R instead of a BIC with a too large parameter 2013-11-06 10:50:30 +01:00
Sacha 81d3df0841 ARMJIT: Minor optimisations for armv6 and armv7. 2013-11-06 15:28:26 +10:00
Sacha 18b7503dd5 Fix rounding errors in armjit. 2013-10-14 19:24:13 +10:00
Unknown W. Brackets 97aa1a631e Improve typesafety in the x86 regalloc. 2013-08-24 19:41:10 -07:00
Unknown W. Brackets 109ad17ac6 Use a typesafe struct for opcodes.
Also, correctly read delayslots using Read_Instruction on ARM.
2013-08-24 15:36:24 -07:00
Henrik Rydgard ebcdd637ee ARMJit bugfixes, enable vmul, vadd, vdiv, vsub.
Prefixes disabled until I can fix clamping.
2013-07-31 00:12:43 +02:00
Henrik Rydgard d8294f025f More VFPU stuff (nothing new activated) 2013-07-30 01:09:11 +02:00
Henrik Rydgard 59644ad59b Jit: Implement VMMUL for ARM, optimize the x86 implementation. Also add VCST. 2013-07-28 12:14:35 +02:00
Henrik Rydgard 2eaf581bbe Add experimental UV prescaling hack, hidden as it's not finished yet.
Most people should ignore this for now, it's a step towards faster skinning in the future.
2013-07-27 23:23:17 +02:00
Henrik Rydgard afcb5add51 Minor code cleanup/reindent around ARM jit 2013-07-27 22:14:01 +02:00
Unknown W. Brackets 7c238f4567 Avoid a signed/unsigned compare.
This one is pretty pedantic.
2013-07-26 22:50:55 -07:00
Jake Traynham e89b2055a6 Reenabled armv7s for iOS with JIT fixes 2013-06-20 11:44:59 -05:00
Sacha 583927988c Armjit Update: Improvements
Implement vsat0 and vsat1
Introduce VMOV for immediates.  Use in MOVI2F where possible by detecting if float val can be encoded.
Combine some vneg ops in ApplyPrefixST.
2013-06-09 21:27:16 +10:00
Sacha f21218c3f9 Armjit: Combine mul.s + neg.s to VNMUL. Implement VNMUL, VNMLA, VNMLS.
I had implemented mul.s + add/sub.s + add/sub.s -> VADD/VSUB + V(N)ML(A/S). Turns out it doesn't happen enough though (once or twice per game).
2013-06-08 16:39:59 +10:00
Sonicadvance1andUnknown W. Brackets cd9b49acfd Updates to ArmEmitter from Dolphin. 2013-04-12 10:14:18 -07:00
Unknown W. Brackets 3466f3c721 armjit: Add fastmem check to FPU.
Could reduce crashes that don't happen on x86.
2013-03-16 20:31:51 -07:00
Sacha ac3f3099e1 Fix the conditional rounding for round to zero. Implement ctc1, cfc1. 2013-03-10 11:25:24 +10:00
Sacha 7782be9a3e Try software rounding mode instead. Use conditionals for VFP functions. Note: Round to Zero not working for some reason? 2013-03-08 22:39:34 +10:00
Sacha fbef590bed Add emitters for VMRS/VMSR. Undisable ceil, which works. Add stub for rounding mode handling. 2013-03-08 22:39:34 +10:00
Sacha 6adb6762f2 Enable instructions: ceil, ins (confirmed working). Buildfix for Qt platforms. 2013-03-08 12:36:04 +10:00
Sacha cc65b0add9 Fix rounding. Was disabling wrong rounding mode. Previous one wasn't merge-ready but should be OK now. Only tests that fail are VFPU now. 2013-03-07 22:34:20 +10:00
Sacha b9ec281c55 Disable rounding methods that aren't working in hardware. Add some notes. Fix compare fall-through and choose right round method. 2013-03-07 21:33:30 +10:00
Sacha 2a9074d92f Fix FPU comp UEQ case. 2013-03-07 14:46:11 +10:00
Sacha 268d16bd24 Use correct args for STR(..) throughout armjit. 2013-03-07 00:59:07 +10:00
Unknown W. Brackets ab05149dbf Add a few more CONDITIONAL_DISABLEs. 2013-03-03 01:44:33 -08:00
Unknown W. Brackets d647816d10 Add CONDITIONAL_DISABLE to all armjit funcs. 2013-03-03 01:40:55 -08:00
Sacha f8d7c024e5 Fix for 'sf' 2013-03-03 06:53:39 +10:00
Sacha 2d5783eb7f ARMJIT: Compare functions are now jitted. 2013-03-03 06:45:21 +10:00
Henrik Rydgard f5581caccc Some work on ARMJIT FPU compares, still not quite working. 2013-03-02 19:09:24 +01:00
Sacha 6c23e1b6d5 Use flags instead of bools for VCVT. Fix up some spacing. Only Android has ArmEmitterTest. 2013-03-02 11:34:03 +10:00
Sacha 0ca7b2a794 The cvt.s.w has to be signed (as it was before). Also, implement f,sf but untested so it is left commented out. 2013-03-01 16:55:10 +10:00
Sacha 26ebdb4f11 Improve VCMP instruction with option for E.
Add comment to le JIT about how the VCMP crashes on ARM11, with commented code.
2013-03-01 15:41:45 +10:00
Sacha 6d3c89e354 Fix up VCVT function to recognise the difference in encoding for to_int and to_float. There is no 'round to zero' option for to_float. cvt.s.w and cvt.w.s should be unsigned. 2013-03-01 13:45:22 +10:00
Sacha 059abc0d69 ARMJIT: Add floor, ceil, round. Introducing a rounding mode for VCVT.
The cvt and trunc are tested heavily. Floor, ceil, round aren't tested as much as there are very few games that use it.
2013-03-01 01:10:07 +10:00
Sacha 61f5fb35bd ARMJIT: Implement cvt.w.s, cvt.s.w and trunc.w.s that are used heavily in Dragonball.
May need to keep note of FCR to get correct rounding mode? Interpreter doesn't do this either.
2013-02-28 19:46:07 +10:00
Sacha fe90d5cd06 Add VNEG and VABS implementations and use in FPU2op. 2013-02-27 23:33:59 +10:00
Henrik Rydgard b8abb77eee More armjit-fpu work - dot product working for example. Add some non working DISABLEd stuff too. 2013-02-16 09:27:48 +01:00
Henrik Rydgard 048cf35922 More ARMJit FPU work - some instructions and optimizations. 2013-02-14 00:02:09 +01:00
Henrik Rydgard c850bca8a2 Delete leftover FlushAll call 2013-02-13 21:15:47 +01:00
Henrik Rydgard b0c160fa93 Fix armjit fpu load / store 2013-02-13 21:07:06 +01:00
Henrik Rydgard af4c7be086 mul.s div.s 2013-02-11 23:58:06 +01:00
Henrik Rydgard ba1171f15d Couple more armjit-fpu instructions. Turn down logging a bit. 2013-02-11 23:39:30 +01:00
Henrik Rydgard 69c3c91d7e add.s/sub.s now appear to work 2013-02-11 23:23:42 +01:00
Henrik Rydgard 4bdb2045a7 Armjit-FPU: Fix lots of bugs, impl some stuff. Still nothing working. 2013-02-11 23:10:11 +01:00
Henrik Rydgard 3a11b030d6 Merge branch 'master' into armjit-fpu
Conflicts:
	Core/MIPS/ARM/ArmCompFPU.cpp
	Core/MIPS/x86/CompFPU.cpp
2013-02-10 15:57:16 +01:00
Henrik Rydgard f75d14d3b5 ARM FPU jit work 2013-02-10 15:53:56 +01:00
Henrik Rydgard 78923f5538 Jit a little more (vfpu single load/store, transfer instructions) 2013-02-10 12:14:55 +01:00
Henrik Rydgard dafc9f62df Regcache fixes, etc. thing still don't work when I turn on addiu :( 2013-01-09 11:20:48 +01:00