preserve-emulation/ppsspp
1
0
Fork 0
mirror of https://github.com/hrydgard/ppsspp.git synced 2026-07-26 00:34:45 +02:00
Code Issues Packages Projects Releases Wiki Activity
10,110 Commits 78 Branches 131 Tags
d6048dc646cd6940751ca1bdfdc53fe8a331b6cf
Commit Graph
79 Commits
Author SHA1 Message Date
Unknown W. Brackets a3a061a69f armjit: Optimize a division by a power of two. 
These really happen.
 2013-11-09 08:43:53 -08:00
Unknown W. Brackets 1776c85882 armjit: Implement a software divide for divu. 
It's not actually that much code.
 2013-11-09 08:43:52 -08:00
Unknown W. Brackets b2a240d105 armjit: Implement msub/msubu. 2013-11-09 08:43:52 -08:00
Unknown W. Brackets cb3bb73148 armjit: Improve GPR typesafety. 2013-11-09 08:24:15 -08:00
Unknown W. Brackets 945b8bf5c5 armjit: optimize reverse subtract, avoid temp imms. 
If we have a non-op2 imm, get rid of it asap.  If we have a op2 friendly
imm, keep it.
 2013-11-09 08:18:43 -08:00
Unknown W. Brackets 415f22ecac armjit: Preserve imms on min/max as well. 2013-11-09 08:18:43 -08:00
Unknown W. Brackets 5d46a82f43 armjit: Use a MOV for add/or with 0. 
Might skip the ALU, so might be faster.
 2013-11-08 11:41:57 -08:00
Unknown W. Brackets b8e126e7ce armjit: Preserve imms in slt/sltu as possible. 2013-11-08 11:41:57 -08:00
Unknown W. Brackets 8393d4aaae armjit: Preserve immediates more in nor. 2013-11-08 11:41:56 -08:00
Unknown W. Brackets d7e42b26a3 armjit: Avoid flushing imm on add t0, imm, imm. 2013-11-08 11:41:56 -08:00
Unknown W. Brackets a435c9dd13 armjit: Optimize movz/movn with immediates. 2013-11-08 11:41:55 -08:00
Unknown W. Brackets 376918c408 armjit: Reverse add t0, N, t1 to preserve imm. 2013-11-08 11:41:55 -08:00
Unknown W. Brackets 02dd250354 armjit: Optimize out a few immediate logic cases. 2013-11-08 11:39:24 -08:00
Henrik Rydgard 309f904c0c Extract JitState into its own header (arm/x86) 2013-11-08 18:51:52 +01:00
Henrik Rydgard 32c95af820 ARM: Some zero-register fixes 2013-11-07 15:29:13 +01:00
Sacha 81d3df0841 ARMJIT: Minor optimisations for armv6 and armv7. 2013-11-06 15:28:26 +10:00
Sacha a5011e3ff0 Improve swap usage in MIPS. ARMv6 can use REV/REV16. Intepreter can use existing swap functions. 2013-11-06 01:20:35 +10:00
Unknown W. Brackets 97aa1a631e Improve typesafety in the x86 regalloc. 2013-08-24 19:41:10 -07:00
Unknown W. Brackets 109ad17ac6 Use a typesafe struct for opcodes. 
Also, correctly read delayslots using Read_Instruction on ARM.
 2013-08-24 15:36:24 -07:00
Sacha 2450c0d28d We can't use S2 or D1. Use alternative means. 2013-06-10 19:28:53 +10:00
Sacha 6712de1136 Armjit: Implement wsbh and wsbw (rev16 and rev). Fix encoding for rev16. 2013-06-05 11:32:44 +10:00
Sacha a14a2fafa9 ARMJIT: Fix and use DIV, DIVU, INS and EXT (ARMv7 and VFPv4 implementations). 2013-05-24 08:26:19 +10:00
Sacha 471ddd6380 Simplify armjit. 2013-03-26 02:41:15 +10:00
Henrik Rydgard 216dc7ad65 Optimize some common ops for immediates 2013-03-10 00:48:44 +01:00
Unknown W. Brackets a589361b82 Call GEtImm() before Map* in case of overlap. 2013-03-09 14:39:17 -08:00
Unknown W. Brackets 9100c4a5a2 armjit: Don't MapReg before checking for IsImm(). 2013-03-09 11:57:02 -08:00
Sacha 6adb6762f2 Enable instructions: ceil, ins (confirmed working). Buildfix for Qt platforms. 2013-03-08 12:36:04 +10:00
Unknown W. Brackets 925e4e42bd armjit: Disable ext for now, breaks Disgaea? 2013-03-07 02:08:45 -08:00
Unknown W. Brackets 028e85dc92 Cleanup some differences between the two jits. 2013-03-07 02:08:44 -08:00
Henrik Rydgard 6702f0c78c Tiny optimization and bugfix 2013-03-07 00:47:48 +01:00
Henrik Rydgard 963a6603fc Fix two armjit bugs the testrunner found. 2013-03-07 00:37:00 +01:00
Sacha 94a11ef3c0 Armjit: Implement movn, movz 2013-03-07 04:11:48 +10:00
Sacha 87de6be239 Fix the shift regs in ARM JIT that were causing graphical issues in some games. Set avoidload flag. 2013-03-07 02:39:28 +10:00
Sacha ae3b881a7f Use correct args for Operand2(..) through armjit. Fix STR(..). 2013-03-07 00:59:07 +10:00
Sacha 9152d2f2bb Armjit: Optimise swl+swr and lwl+lwr cases that can be combined to a single sw or lw. Add shift flags to STR/LDR. Add EatInstruction to ArmJit. 2013-03-06 02:11:36 +10:00
Sacha 33c6df55db Build fix 2013-03-05 15:20:14 +10:00
Sacha 65a83d70c7 Armjit: Implement clo as well. Fix up the reg usage in div/divu comment. 2013-03-05 15:14:22 +10:00
Sacha 60b84e71d5 Armjit: Re-enable reg shifts. Thanks [Unknown] for finding the issue. 2013-03-05 14:55:33 +10:00
Sacha 4641cf376f Armjit: Implement CLZ instruction. Disable reg shifts for now (breaks Wipeout Pure). 2013-03-05 14:16:35 +10:00
Sacha 4a56ebd0a0 Armjit: Add sllv, srlv, srav instructions (reg shift). 2013-03-05 13:52:03 +10:00
Sacha 10ad797c6d Armjit stubs. 
Add a double encoding for VCVT. Implement integer divide (but not working yet). Stubs for msub/msubu. Don't detect vfpv3 on Symbian.
 2013-03-05 13:16:08 +10:00
Sacha d5feb4d3ff Quick build fix 2013-03-05 03:13:33 +10:00
Sacha 1089a31a45 Armjit: add reverse bit instruction. 2013-03-05 02:58:51 +10:00
Sacha bce3295950 Fix graphical issues. DISABLE INS instruction for now. Fix OR (it was doing AND). 2013-03-04 22:09:45 +10:00
Henrik Rydgard 165cfe53a3 Quick ins bugfix 2013-03-04 00:06:33 +01:00
Henrik Rydgard 7dc75d87b5 armjit: Re-enable ext/ins, safer implementation. arm7 path disabled for now. 2013-03-03 23:17:21 +01:00
Henrik Rydgard 1cddc86e05 armjit: Temporarily disable ext/ins as they appear to have broken Persona 3 somehow. 2013-03-03 22:26:20 +01:00
Henrik Rydgard 650c02c3a5 Some more armjit work (ext, ins) and VFPU prefix clamps (not enabled) 2013-03-03 17:36:22 +01:00
Henrik Rydgard 3c640a0f1e armjit: seb and seh instructions 2013-03-03 15:29:13 +01:00
Unknown W. Brackets d647816d10 Add CONDITIONAL_DISABLE to all armjit funcs. 2013-03-03 01:40:55 -08:00