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11,573 Commits 99 Branches 131 Tags
cb4e72058aaa7165dd9da170cb1cca74b89ae281
Commit Graph
376 Commits
Author SHA1 Message Date
Henrik Rydgard 516ca8a0c4 Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/ARM/ArmJit.h
	Core/MIPS/x86/CompVFPU.cpp
	GPU/GLES/Framebuffer.cpp
 2013-02-28 23:56:28 +01:00
Unknown W. Brackets 64c42ffaf2 Fix some warnings generated by clang. 2013-02-24 10:23:31 -08:00
Unknown W. Brackets 3fbb5d4388 Avoid using CALL() directly in case of far calls. 
This mainly matters for x64.
 2013-02-24 00:12:55 -08:00
Unknown W. Brackets 7eb9af271b Fix downcount check without fastmem in jr. 2013-02-23 14:30:24 -08:00
Unknown W. Brackets 2164a7fdf9 Keep track of whether we're in the runloop or not. 2013-02-23 13:01:00 -08:00
Unknown W. Brackets 313ffdb495 Add a stub for clz/clo in x86 jit. 2013-02-21 01:25:02 -08:00
Unknown W. Brackets 08923c092b Implement ins and ext in the x86 jit. 2013-02-21 01:25:01 -08:00
Unknown W. Brackets dede852c03 Optimize out slti in the x86 jit. 
I'm kinda surprised this actually happens...
 2013-02-21 01:25:01 -08:00
Unknown W. Brackets abde404c00 Optimize out some addu/etc. calls against imms. 2013-02-21 01:25:01 -08:00
Unknown W. Brackets 9e479b4391 Optimize addi/addiu to just LEA when possible. 2013-02-21 01:25:00 -08:00
Unknown W. Brackets 2db368c29a Add more imm handling for shifts in x86 jit. 
This is actually hit, and propagates more imms through.
 2013-02-21 01:25:00 -08:00
Unknown W. Brackets 958d95a029 Make bitrev use less instructions in the x86 jit. 
Much less.
 2013-02-20 13:43:17 -08:00
Unknown W. Brackets 7b612cf28d Don't need this with the imm code path. 2013-02-20 12:16:57 -08:00
Unknown W. Brackets c8f85ace41 Implement bitrev in x86 jit + some imms. 2013-02-20 12:09:02 -08:00
Unknown W. Brackets c3be50acbb Implement movz/movn in the x86 jit. 2013-02-20 12:09:01 -08:00
Unknown W. Brackets 0d6d58fed4 Add min and max to the x86 jit portfolio. 2013-02-20 12:09:01 -08:00
Henrik Rydgard 5a09885a59 Port over much of unknown's vfpu jit work to arm. Untested. 2013-02-20 00:04:21 +01:00
Unknown W. Brackets 038394b081 Divide from -1.0 directly in x86 jit vnrcp. 2013-02-19 00:35:15 -08:00
Unknown W. Brackets a438791e7c Initial (very inefficient) vmmov for x86 jit. 
This makes #464 work (at least LittleBigPlanet), but only in x86 jit.
 2013-02-18 23:21:18 -08:00
Unknown W. Brackets b8e2177591 Jit vzero/vone, which are easy and common (x86.) 2013-02-18 22:15:47 -08:00
Unknown W. Brackets a001b8b6f0 Tweak and note vsat0/vsat1 NaN handling. 2013-02-18 22:06:49 -08:00
Unknown W. Brackets 40b2a8dec1 Drop the sign in vsqrt, but not vrsq. 2013-02-18 21:46:33 -08:00
Unknown W. Brackets 2e6f0006fd Oops, correct the bounds check. 2013-02-18 20:43:43 -08:00
Unknown W. Brackets a3eba1e96e Fix typo, should definitely be VX(). 2013-02-18 20:43:43 -08:00
Unknown W. Brackets 2dfdf3ffeb Implement Comp_VV2Op vfpu ops in the x86 jit. 
Also, some cleanup.  No need for this extra boilerplate, simplify...

This makes the Bink video issue slightly better, in jit only.
 2013-02-18 20:43:28 -08:00
Henrik Rydgard e32721c72a Merge branch 'master' into armjit-fpu 
Conflicts:
	Core/MIPS/MIPSVFPUUtils.cpp
	Core/MIPS/x86/CompVFPU.cpp
	GPU/GLES/VertexDecoder.cpp
 2013-02-19 00:50:33 +01:00
Unknown W. Brackets dacbcbdf2b Add a MIPSTables flag for ignoring the prefix. 2013-02-18 01:23:15 -08:00
Unknown W. Brackets afb7c0b83c Assume prefixes start default until proven wrong. 
Currently this means nothing since the MIPSTables flags are wrong.
It will blow the cache once, after the first vfpu op.
 2013-02-18 01:14:57 -08:00
Unknown W. Brackets 0bfc380575 Try to reuse temp regs for better caching. 2013-02-18 00:32:42 -08:00
Unknown W. Brackets 6855398add Support known prefixes in the vfpu jit. 2013-02-18 00:11:58 -08:00
Unknown W. Brackets 8ea59990ab Make applying prefixes mostly automatic. 
And implement (hopefully) D prefixes.
 2013-02-18 00:11:57 -08:00
Unknown W. Brackets 18c03d0816 Handle temp regs better, no need for direct access. 2013-02-18 00:11:57 -08:00
Unknown W. Brackets 27942606ad Use prefixD directly in jit, just like interp now. 2013-02-17 22:46:34 -08:00
Unknown W. Brackets 08a42a1aaf Preserve orig regs when applying vfpu prefixes. 2013-02-17 22:37:56 -08:00
Unknown W. Brackets d63548799b Add more temp regs, allow swapping if necessary. 2013-02-17 22:18:46 -08:00
Unknown W. Brackets 7fee4dfd13 Re-enable vdot and vadd/etc. in x86 jit. 2013-02-17 17:53:53 -08:00
Unknown W. Brackets f532951331 Automatically eat prefixes in x86 jit. 
Simplifies the code and makes it easier to know they're eaten
even for ops not yet jitted.
 2013-02-17 17:53:53 -08:00
Unknown W. Brackets 6191017a2c Fix jit VDot mapping vd incorrectly to a quad. 2013-02-17 17:52:59 -08:00
Unknown W. Brackets 106cbcfc5d Fix possible overlap issue in VDot. 2013-02-16 21:26:32 -08:00
Unknown W. Brackets 0fdc975fde Fix wrong type in x86 jit fpu/vfpu load store. 2013-02-16 20:22:08 -08:00
Unknown W. Brackets 6eae8ed36a Disable VDot and Vec3 in x86 jit, broke things. 2013-02-16 19:57:35 -08:00
Unknown W. Brackets b27701ac7d Fix VDot returning -0.0 in x86 jit. 2013-02-16 10:37:42 -08:00
Unknown W. Brackets 1c4c5e718b Optimize VDot and VecDo3 to avoid temporaries. 2013-02-16 10:19:05 -08:00
Unknown W. Brackets 0bd382c518 Discard temp regs right away, some helper funcs. 2013-02-16 10:18:13 -08:00
Unknown W. Brackets 0d5da967eb Enable VDot and Vec3 in x86 jit. 2013-02-16 03:27:48 -08:00
Unknown W. Brackets 35537b3c97 Add TEMP0 fpu regs to x86 like in armjit. 
But... will probably need more and the ability to swap into memory
if we want to deal with prefixes.
 2013-02-16 03:27:03 -08:00
Henrik Rydgard 909b768f47 Don't need separate variables for writemask. Some optimizations. 2013-02-16 09:28:55 +01:00
Henrik Rydgard b8abb77eee More armjit-fpu work - dot product working for example. Add some non working DISABLEd stuff too. 2013-02-16 09:27:48 +01:00
Unknown W. Brackets be8ddf12aa Don't go out of bounds applying vfpu swizzle. 2013-02-15 23:43:40 -08:00
Henrik Rydgard 0ee7578d68 Merge branch 'master' into armjit-fpu 2013-02-15 23:09:59 +01:00