 Unknown W. Brackets
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2347498667
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x86jit: Use templates to avoid some void * casts.
Makes it a bit cleaner and potentially safer.
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2014-01-18 09:57:13 -08:00 |
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Unknown W. Brackets
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dffa35ef2f
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When ins is used with a zero argument, don't OR.
Seems it's used effectively to mask out bits with rs=zero. Makes sense...
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2013-11-29 09:17:12 -08:00 |
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Unknown W. Brackets
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fd38b10ab6
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x86jit: Rename imm funcs to match armjit.
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2013-11-10 21:59:49 -08:00 |
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Unknown W. Brackets
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3a8f0598c4
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x86jit: Implement wsbh/wsbw.
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2013-11-10 14:38:09 -08:00 |
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Henrik Rydgard
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5ad04a23f4
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x86 jit: Rename BindToRegister to MapReg
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2013-11-09 15:23:31 +01:00 |
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Unknown W. Brackets
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02dd250354
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armjit: Optimize out a few immediate logic cases.
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2013-11-08 11:39:24 -08:00 |
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Unknown W. Brackets
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97aa1a631e
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Improve typesafety in the x86 regalloc.
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2013-08-24 19:41:10 -07:00 |
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Unknown W. Brackets
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109ad17ac6
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Use a typesafe struct for opcodes.
Also, correctly read delayslots using Read_Instruction on ARM.
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2013-08-24 15:36:24 -07:00 |
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Unknown W. Brackets
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3278b5e373
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Handle the immediate case of clz/clo.
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2013-07-04 23:07:42 -07:00 |
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Unknown W. Brackets
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654490566f
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Implement clz/clo in x86 jit.
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2013-07-04 18:01:17 -07:00 |
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Sacha
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a26b48fc0b
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Stub wsbh/wsbw for x86.
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2013-06-05 14:55:01 +10:00 |
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Unknown W. Brackets
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028e85dc92
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Cleanup some differences between the two jits.
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2013-03-07 02:08:44 -08:00 |
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Unknown W. Brackets
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313ffdb495
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Add a stub for clz/clo in x86 jit.
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2013-02-21 01:25:02 -08:00 |
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Unknown W. Brackets
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08923c092b
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Implement ins and ext in the x86 jit.
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2013-02-21 01:25:01 -08:00 |
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Unknown W. Brackets
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dede852c03
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Optimize out slti in the x86 jit.
I'm kinda surprised this actually happens...
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2013-02-21 01:25:01 -08:00 |
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Unknown W. Brackets
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abde404c00
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Optimize out some addu/etc. calls against imms.
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2013-02-21 01:25:01 -08:00 |
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Unknown W. Brackets
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9e479b4391
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Optimize addi/addiu to just LEA when possible.
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2013-02-21 01:25:00 -08:00 |
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Unknown W. Brackets
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2db368c29a
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Add more imm handling for shifts in x86 jit.
This is actually hit, and propagates more imms through.
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2013-02-21 01:25:00 -08:00 |
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Unknown W. Brackets
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958d95a029
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Make bitrev use less instructions in the x86 jit.
Much less.
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2013-02-20 13:43:17 -08:00 |
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Unknown W. Brackets
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7b612cf28d
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Don't need this with the imm code path.
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2013-02-20 12:16:57 -08:00 |
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Unknown W. Brackets
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c8f85ace41
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Implement bitrev in x86 jit + some imms.
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2013-02-20 12:09:02 -08:00 |
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Unknown W. Brackets
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c3be50acbb
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Implement movz/movn in the x86 jit.
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2013-02-20 12:09:01 -08:00 |
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Unknown W. Brackets
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0d6d58fed4
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Add min and max to the x86 jit portfolio.
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2013-02-20 12:09:01 -08:00 |
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Unknown W. Brackets
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f6f2927526
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Add curlies around DISABLE/CONDITIONAL_DISABLE.
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2013-02-15 08:35:33 -08:00 |
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Unknown W. Brackets
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7c428bfeba
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Fix immediate div CMP.
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2013-02-10 10:02:55 -08:00 |
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Unknown W. Brackets
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e0ebfd2211
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Jit div/divu in x86.
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2013-02-10 09:36:41 -08:00 |
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Unknown W. Brackets
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9bb78ce2ec
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Jit madd/msub in x86.
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2013-02-10 08:45:35 -08:00 |
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Henrik Rydgard
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78923f5538
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Jit a little more (vfpu single load/store, transfer instructions)
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2013-02-10 12:14:55 +01:00 |
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Unknown W. Brackets
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6bee870ac9
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Fix CompShiftVar for x86 jit.
In case rd == rs, need to load ECX first. I can't find anything
else wrong with it for it to be disabled.
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2013-02-02 14:02:07 -08:00 |
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Henrik Rydgard
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90b11bba37
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Implement mult, multu, mflo/hi, mtlo/hi in x86 JIT
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2013-01-29 00:48:42 +01:00 |
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Unknown W. Brackets
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db5fa233a8
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Make sure we don't mark a reg dirty on noop.
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2013-01-25 22:34:01 -08:00 |
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Henrik Rydgard
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2738417040
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VFPU JIT: start setting up infrastructure. very incomplete. vdot works if undisabled, but isn't complete.
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2013-01-26 01:34:19 +01:00 |
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Unknown W. Brackets
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a7c6f46829
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Optimize and/or 0 to just a mov in x86 jit.
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2013-01-25 00:25:40 -08:00 |
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Unknown W. Brackets
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ab9bea068c
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Jit reg+reg compile time, and avoid flushing EDX.
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2013-01-25 00:16:55 -08:00 |
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Unknown W. Brackets
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ce5f393fb8
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Hit immediates in the ALU better and more simply.
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2013-01-25 00:16:55 -08:00 |
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Henrik Rydgard
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f326c36220
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Some cleanup, re-enable some apparently disabled jit ops
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2012-11-18 23:14:22 +01:00 |
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Henrik Rydgard
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7720dc3f60
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Various warning, logging, jit fixes
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2012-11-17 19:56:28 +01:00 |
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Henrik Rydgard
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d485b76e11
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Jit fixes, test update
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2012-11-12 14:35:10 +01:00 |
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Henrik Rydgard
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9bc7385502
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Power test working
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2012-11-11 19:32:27 +01:00 |
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Henrik Rydgard
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64cc573703
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Switch to "GPL 2.0 or later" for various reasons. I wrote most of the code I imported from Dolphin (which is GPL2-but-not-later), so it should be OK.
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2012-11-04 23:24:00 +01:00 |
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Henrik Rydgard
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4f7ad15758
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Add snapshot of the whole source code.
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2012-11-01 16:19:01 +01:00 |
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