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39,166 Commits 76 Branches 131 Tags
ca94de8d4b1e53b7d596d31e7336ac5133a32a7c
Commit Graph
336 Commits
Author SHA1 Message Date
Herman Semenov b871e76d05 [Core/Debugger/FileLoaders/FileSystems/MIPS] Using reserve if possible 2023-12-15 13:59:19 +03:00
Unknown W. Brackets 2a24c99441 arm64jit: Correct FlushBeforeCall pairing. 
Oops, some silly mistakes here.
 2023-10-14 20:54:40 -07:00
Unknown W. Brackets b85b0476b9 arm64jit: Correct vdot vec4 mapping. 2023-10-14 20:54:40 -07:00
Henrik RydgårdandGitHub db805cc4cc Merge pull request #18282 from unknownbrackets/ir-compiling 
Improve IR compilation performance
 2023-10-01 11:34:27 +02:00
Unknown W. Brackets 00c80cea6e irjit: Optimize offset logging during compile. 
As I guessed, this was expensive.  using a vector and reserve isn't very.
It's nice to keep this before logBlocks_ is > 0, in case it's set mid
block.
 2023-09-30 15:56:18 -07:00
Unknown W. Brackets 4380bf9787 arm64jit: Optimize transfers to vec4 better. 2023-09-30 15:44:53 -07:00
Unknown W. Brackets cb835295c8 arm64jit: Implement reg lane transfers. 2023-09-30 15:44:41 -07:00
Henrik Rydgård 84d0236bf4 Comment fixes 2023-09-27 12:31:17 +02:00
Henrik RydgårdandGitHub d6a8bfdf3e Merge pull request #18249 from unknownbrackets/arm64jit-vcrsp 
arm64jit: Avoid fused multiplies in vcrsp.t
 2023-09-27 08:49:01 +02:00
Unknown W. Brackets ded18ff237 arm64jit: Avoid fused multiplies in vcrsp.t. 
With this change, issues in Harvest Moon with teleporting animals seem to
disappear.  It was causing some differences in signs of zeros in results,
and slightly different result values.
 2023-09-26 20:09:02 -07:00
Henrik Rydgård 51d5026792 WriteExit: Assert on bad exit numbers 2023-09-26 19:39:48 +02:00
Henrik RydgårdandGitHub 9fffa33eee Merge pull request #18234 from unknownbrackets/x86-ir-transfer 
x86jit: Perform vector transfers instead of flushing to memory
 2023-09-26 09:28:05 +02:00
Unknown W. Brackets 9b2fa46861 IR: Add mini native jit MIPS block profiler. 2023-09-24 23:04:29 -07:00
Unknown W. Brackets 88b6442527 irjit: Add facility for native reg transfer. 2023-09-24 16:28:29 -07:00
Henrik RydgårdandGitHub 06a1f0b72c Merge pull request #18226 from unknownbrackets/x86-ir-breakpoints 
x86jit: Improve memory breakpoint speed
 2023-09-25 00:47:22 +02:00
Unknown W. Brackets 7d0f2e43b6 irjit: Fix safety of kernel bit memory addresses. 2023-09-24 10:18:55 -07:00
Unknown W. Brackets decccf199a x86jit: Flush floats together if possible. 2023-09-24 08:01:05 -07:00
Unknown W. Brackets 772b3ff7b8 arm64jit: Tweak memchecks. 2023-09-24 07:42:11 -07:00
Unknown W. Brackets e433a8be4a arm64jit: Speed up memchecks, add validation. 2023-09-24 07:42:11 -07:00
Henrik RydgårdandGitHub ac3139b8ee Merge pull request #18213 from unknownbrackets/x86-ir-fcmp 
IR: Improve fcmp/vfpu compare jit
 2023-09-24 09:29:14 +02:00
Unknown W. Brackets 15f01b13a2 x86jit: Small tweak for SltU zero, x. 2023-09-23 22:00:38 -07:00
Unknown W. Brackets 14e2e1ed62 x64jit: Optimize FCmpVfpuAggregate. 2023-09-23 14:31:46 -07:00
Henrik Rydgård e64d1e94fe add reporting to the invalid replacement op 2023-09-23 11:39:20 +02:00
Henrik Rydgård 8fc01e37d9 Check for bad indices in GetReplacementFunc to avoid crashes 2023-09-23 10:09:55 +02:00
Henrik Rydgård 8a90e94e74 Add an assert to try to track down a mysterious reported crash. 2023-09-21 12:08:16 +02:00
Unknown W. Brackets 7a5cdafdf3 arm64jit: Implement convert/int conversions. 2023-09-08 00:03:12 -07:00
Unknown W. Brackets b698c673a8 arm64jit: Implement FSat. 2023-09-08 00:03:12 -07:00
Unknown W. Brackets c523273d51 arm64jit: Implement vector unpacks. 2023-09-08 00:03:12 -07:00
Unknown W. Brackets e03ae26d20 arm64jit: Implement vuc2i. 2023-09-08 00:02:53 -07:00
Unknown W. Brackets a21a882add arm64jit: Implement a few vector ops. 2023-09-08 00:02:53 -07:00
Unknown W. Brackets a8f81b4289 arm64jit: Add breakpoints/memchecks. 2023-09-08 00:02:53 -07:00
Henrik RydgårdandGitHub 0a234df037 Merge pull request #18089 from unknownbrackets/arm64jit-float 
arm64jit: Implement VFPU compare, trig, couple others
 2023-09-08 08:33:22 +02:00
Unknown W. Brackets 5617d08620 arm64jit: Remove unused variable. 2023-09-07 17:26:30 -07:00
Nemoumbra 0faa1109d2 Included <algorithm> for std::min 2023-09-07 12:14:36 +03:00
Unknown W. Brackets 03f22beefd arm64jit: Implement Vec2Pack32To16. 2023-09-06 20:20:52 -07:00
Unknown W. Brackets 178bb8416b arm64jit: Implement FSpecial. 2023-09-06 20:08:36 -07:00
Unknown W. Brackets fad24e3b44 arm64jit: Implement FSign. 2023-09-06 19:53:49 -07:00
Unknown W. Brackets a1304f6ac8 arm64jit: Implement VFPU compare in IR. 2023-09-06 19:02:24 -07:00
Unknown W. Brackets 01ed48a3d0 arm64jit: Implement FCvtSW. 2023-09-06 00:09:26 -07:00
Unknown W. Brackets 89a9584c38 arm64jit: Implement FRound/similar. 2023-09-06 00:09:26 -07:00
Unknown W. Brackets 97d9a7f07f arm64jit: Implement FCmp. 2023-09-06 00:09:26 -07:00
Unknown W. Brackets c8f888fab0 arm64jit: Implement FMin/FMax. 2023-09-06 00:09:26 -07:00
Unknown W. Brackets 953d97b54a arm64jit: Implement Vec4Init. 2023-09-05 00:10:26 -07:00
Unknown W. Brackets 11f92b4684 arm64jit: Implement Vec4Dot. 2023-09-05 00:10:26 -07:00
Unknown W. Brackets 81aeb04788 arm64jit: Implement Vec4Blend. 2023-09-05 00:10:26 -07:00
Unknown W. Brackets 85387b44a1 arm64jit: Implement Vec4Scale. 2023-09-05 00:10:26 -07:00
Unknown W. BracketsandGitHub 3f29b4c713 Merge pull request #18068 from unknownbrackets/arm64jit-shuffle 
arm64jit: Implement shuffle optimizer
 2023-09-05 00:10:08 -07:00
Unknown W. Brackets d8231ecb17 arm64jit: Implement divide in IR. 2023-09-04 23:38:55 -07:00
Unknown W. Brackets c272284043 arm64jit: Implement multiplies in IR. 2023-09-04 23:38:55 -07:00
Unknown W. Brackets 17ffc9c261 arm64jit: Special case some shuffles. 
To avoid 4 instruction shuffles.
 2023-09-04 23:37:40 -07:00