Henrik Rydgård and Claude Opus 5.5
eaf55c467b
IR: Fold ClampToZero into the 31-bit packs
...
Vec4ClampToZero and Vec2ClampToZero only ever fed Vec4Pack31To8 and
Vec2Pack31To16, for vi2uc and vi2us. The packs now clamp negative lanes
to zero themselves, which saves an op and a vector temp, and lets x64
clamp with PACKUSWB's saturation after an arithmetic shift.
While at it, RISC-V compiles Vec2Unpack16To31, Vec2Pack31To16 and
Vec4Pack32To8, and LoongArch Vec2Unpack16To31, Vec2Pack31To16 and the
non-LSX Vec4Pack32To8, all of which went to the IR interpreter.
LoongArch's Vec2Pack32To16 and Vec2Unpack16To32 now take their scalar
path with LSX too, instead of falling back.
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com >
2026-09-24 14:31:22 -06:00
Henrik Rydgård
0c077acc74
Do some include untangling, to limit the spread of the Windows.h include from SevenZipFileReader.h
2026-03-27 14:34:18 -06:00
Henrik Rydgård
1b0e701c87
Expose some more pointers in the ImDebugger UI
2026-02-17 22:40:00 +01:00
Henrik Rydgård
f0ba391a4e
Remove the whole concept of proxy blocks from the block cache, and experimental uses of it.
2026-02-17 09:40:27 +01:00
Henrik Rydgård
ba148e5ec7
JIT/IRJit: Delete an old "function preloading" experiment
...
This caused some confusion while trying to debug #20502
2025-06-11 15:45:18 +02:00
Henrik Rydgård
85e7ff7ac3
Target->Native renaming. More intuitive (at least to me)
2024-07-22 01:24:34 +02:00
Henrik Rydgård
78c75e1a0b
Delete duplicate function (now that we can easily check for compileToNative)
2024-07-21 19:17:21 +02:00
Henrik Rydgård
5526ef012c
Store IR instructions in a large arena vector instead of loosely in each block.
2024-06-07 09:28:27 +02:00
Henrik Rydgård
294593f741
Fix IR profiling
2024-06-05 19:12:08 +02:00
Henrik Rydgård
3bb74ea9ad
Rework the JitCompare window to hold a list of blocks, and allow some filtering and browsing
2024-06-05 18:16:33 +02:00
Henrik Rydgård
f2837e3b55
JIT compare screen with IR blocks - fix some crashing issues
2024-05-26 14:10:50 +02:00
Unknown W. Brackets
9b2fa46861
IR: Add mini native jit MIPS block profiler.
2023-09-24 23:04:29 -07:00
Unknown W. Brackets
e433a8be4a
arm64jit: Speed up memchecks, add validation.
2023-09-24 07:42:11 -07:00
Unknown W. Brackets
cec9dbbdf7
Build: Add some missing include guards.
2023-09-07 17:14:58 -07:00
Unknown W. Brackets
1b756ff8c1
arm64jit: Add initial base for IR jit.
...
This works, but very slowly at this point.
2023-09-03 12:14:28 -07:00
Unknown W. Brackets
fcc90095f7
riscv: Enable block linking.
2023-08-12 09:37:02 -07:00
Unknown W. Brackets
3757ebca2d
irjit: Invalidate/finalize target blocks.
...
Doesn't actually do anything yet, but adds plumbing.
2023-08-12 09:37:02 -07:00
Unknown W. Brackets
ad4cbbab8e
riscv: Don't cache mipState on backend.
...
Bad sign if we're trying to use it, anyway.
2023-08-08 23:17:32 -07:00
Unknown W. Brackets
93e3d35f5d
irjit: Move more to IRNativeBackend, split.
2023-08-06 00:16:43 -07:00
Unknown W. Brackets
691799a0ca
irjit: Centralize native jit compile dispatch.
2023-08-03 23:14:58 -07:00
