Unknown W. Brackets
928e2adfc9
jit: Avoid applying/restoring the rounding mode.
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If the game never sets it, we can skip around syscalls, interpreter,
replacements, etc.
2014-10-12 12:51:45 -07:00
Unknown W. Brackets
8d0dca71fe
jit: Rename the rounding mode funcs to clarify.
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They apply/restore the value, set/clear is confusing.
2014-10-12 11:35:20 -07:00
Unknown W. Brackets
52b6f1095e
armjit: Fix rounding mode, allow non flush-to-zero.
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Default: force flush to zero (for RunFast mode.) But now it's an ini
option so we can more easily compare armjit differences.
2014-09-11 07:58:51 -07:00
Andrew Church and Andrew Church
3033dc5138
Revert to unconditional ClearRoundingMode() when setting FCR31.
2014-09-04 11:36:56 +09:00
Andrew Church and Andrew Church
726cb851b9
Don't unconditionally ClearRoundingMode() before setting it.
2014-09-04 09:28:56 +09:00
Andrew Church and Andrew Church
5816685668
Handle the FS (flush-to-zero) bit in FCR31 for x86 JIT.
2014-09-04 01:50:24 +09:00
Unknown W. Brackets
5f6f6827b5
jit: Update rounding mode immediately on ctc1.
2014-08-30 23:48:27 -07:00
Unknown W. Brackets
925557ed47
x86jit: Maintain the rounding mode always.
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This should be less often than doing it per block that uses fpu, unless
the game doesn't use fpu much at all.
2014-08-22 09:53:00 -07:00
Unknown W. Brackets
ab13b36484
x86jit: Implement cvt.w.s.
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Not really used that often, anyway, but easy enough and good for testing
that we set the rounding mode correctly.
2014-08-22 00:01:06 -07:00
Unknown W. Brackets
dc91dc1ce8
x86jit: Support fpu rounding modes for mul, etc.
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Fixes Gods Eater Burst loading PSP savedata, but can no longer load old
savedata.
2014-08-21 23:59:55 -07:00
Unknown W. Brackets
acad2e1763
x86jit: Cache fpcond in a register.
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Mostly to match armjit.
2014-06-28 00:38:55 -07:00
Unknown W. Brackets
6ccae8f5a7
x86jit: Use a faster safemem fallback.
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Really helps performance in games that use uncached addresses a lot,
without really impacting performance of most games which don't.
Of course, fastmem is faster.
2014-05-06 08:05:12 -07:00
Unknown W. Brackets
246eaeb209
x86jit: Avoid mem temp for float cmp/loads.
2014-03-22 15:56:28 -07:00
Unknown W. Brackets
05ab192c9c
Reduce includes in Core/HLE/.
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Especially templates.
2014-03-15 11:22:19 -07:00
Unknown W. Brackets
2347498667
x86jit: Use templates to avoid some void * casts.
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Makes it a bit cleaner and potentially safer.
2014-01-18 09:57:13 -08:00
Henrik Rydgard
455a73bba7
Bugfix replace function inlining (compilerPC needs to be increased). Misc.
2013-12-20 15:37:37 +01:00
Henrik Rydgard
06ce01ea04
Remove erroneous comment.
2013-11-09 17:34:52 +01:00
Henrik Rydgard
5ad04a23f4
x86 jit: Rename BindToRegister to MapReg
2013-11-09 15:23:31 +01:00
Henrik Rydgard
316d23d4cc
Optimize mfv/mtv/mfc1/mtc1 on x86 too
2013-11-09 14:06:45 +01:00
Unknown W. Brackets
cbf1df9b01
Check for nan/inf in trunc.w.s in x86 jit.
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Now x86 jit passes the fpu test too.
2013-09-13 22:32:25 -07:00
Unknown W. Brackets
97aa1a631e
Improve typesafety in the x86 regalloc.
2013-08-24 19:41:10 -07:00
Unknown W. Brackets
109ad17ac6
Use a typesafe struct for opcodes.
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Also, correctly read delayslots using Read_Instruction on ARM.
2013-08-24 15:36:24 -07:00
Henrik Rydgard
89ddbb51bb
Oops, XMM0 might be taken by temps. Also, s/GC_ALIGN16/MEMORY_ALIGN16
2013-08-10 23:39:24 +02:00
Henrik Rydgard
2f0cdc6988
ARMJIT: disable vi2f, it seems buggy. preliminary disabled impl of vcrsp.t.
2013-08-06 11:10:26 +02:00
Unknown W. Brackets
2d6a730cac
Add some basics for memory checks to x86 jit.
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Specifically, we will need to be able to bail in delayslots,
and we will need to know the size of the access (useful anyway.)
2013-03-09 02:41:46 -08:00
Henrik Rydgard
e32721c72a
Merge branch 'master' into armjit-fpu
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Conflicts:
Core/MIPS/MIPSVFPUUtils.cpp
Core/MIPS/x86/CompVFPU.cpp
GPU/GLES/VertexDecoder.cpp
2013-02-19 00:50:33 +01:00
Unknown W. Brackets
0fdc975fde
Fix wrong type in x86 jit fpu/vfpu load store.
2013-02-16 20:22:08 -08:00
Henrik Rydgard
44e4ba8772
Merge branch 'master' into armjit-fpu
2013-02-15 21:42:44 +01:00
Unknown W. Brackets
f6f2927526
Add curlies around DISABLE/CONDITIONAL_DISABLE.
2013-02-15 08:35:33 -08:00
Unknown W. Brackets
abe390e6f3
Add some checks for fpu/vfpu writing to $0.
2013-02-14 00:27:09 -08:00
Unknown W. Brackets
4789a8e5eb
Oops, can't have CONDITIONAL_DISABLE here, no op.
2013-02-14 00:27:08 -08:00
Henrik Rydgard
30318a4a4d
Merge branch 'master' into armjit-fpu
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Conflicts:
Core/MIPS/x86/CompFPU.cpp
2013-02-13 20:47:41 +01:00
Unknown W. Brackets
f1386dfca1
Add a quick optimization to the x86 fpu comps.
2013-02-13 02:21:26 -08:00
Unknown W. Brackets
19cc652a37
Correct NaN handling in fpu comparisons.
2013-02-13 01:54:07 -08:00
Unknown W. Brackets
3cab6986c5
Jit the FPU comparisons on x86.
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Probably not too fast. Also, NaN handling seems wrong?
2013-02-13 00:55:10 -08:00
Henrik Rydgard
2c01b36585
Some FPU optimization
2013-02-12 00:58:31 +01:00
Henrik Rydgard
3a11b030d6
Merge branch 'master' into armjit-fpu
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Conflicts:
Core/MIPS/ARM/ArmCompFPU.cpp
Core/MIPS/x86/CompFPU.cpp
2013-02-10 15:57:16 +01:00
Henrik Rydgard
f75d14d3b5
ARM FPU jit work
2013-02-10 15:53:56 +01:00
Henrik Rydgard
78923f5538
Jit a little more (vfpu single load/store, transfer instructions)
2013-02-10 12:14:55 +01:00
Henrik Rydgard
377c94b125
JIT x86: cvt.s.w
2013-02-06 20:29:49 +01:00
Unknown W. Brackets
b77ce99d01
Oops, no slow read for immediates usually.
2013-01-26 09:27:52 -08:00
Unknown W. Brackets
9cd5836b85
Rename WriteFinish() to Finish() is safe mem.
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It's nothing to do with writing.
2013-01-26 09:09:47 -08:00
Unknown W. Brackets
3e419f513a
Refactor jit safe memory reads without dup code.
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But, maybe too automagical...
2013-01-26 08:42:34 -08:00
Unknown W. Brackets
b7ef3e7bef
Make sure to log / check bad immediate mem access.
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Although, theoretically, this should never happen.
Also, definitely time to refactor.
2013-01-25 23:06:43 -08:00
Unknown W. Brackets
3418383917
Immediately break on bad mem access in jit slowmem.
2013-01-25 22:52:51 -08:00
Henrik Rydgard
68991511ee
Split out the FPU reg cache into its own file too.
2013-01-26 01:34:19 +01:00
Unknown W. Brackets
a43078ab68
Same optimization for FPU load / store.
2013-01-20 13:16:41 -08:00
Unknown W. Brackets
da22eb8adf
Make swc1 and lwc1 fast even without fastmem.
2013-01-20 02:07:00 -08:00
Henrik Rydgard
f5efd6f2b1
JIT: add option to enable/disable jit of memory instructions. for crash safety.
2012-12-21 16:50:13 +01:00
Henrik Rydgard
d485b76e11
Jit fixes, test update
2012-11-12 14:35:10 +01:00
Unknown W. Brackets