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14,929 Commits 78 Branches 131 Tags
c41e4ef9055df28362b950b7cf99b2873d8a3dac
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80 Commits
Author SHA1 Message Date
Unknown W. Brackets 100afc07a2 x86jit: Fix andLink cases of imm blezl, etc. 2014-10-24 08:57:56 -07:00
Unknown W. Brackets b53f13480a x86jit: Centralize continuing logic. 2014-10-12 19:01:04 -07:00
Unknown W. Brackets d98adf27d6 x86jit: Add proxy blocks for continuing. 2014-10-12 17:15:31 -07:00
Unknown W. Brackets 5fd402222b x86jit: Use the shorter MDisp() offset for andLink. 2014-10-12 15:18:22 -07:00
Unknown W. Brackets 0f32103615 x86jit: Consistently use mips_. 2014-10-12 15:16:09 -07:00
Unknown W. Brackets 6fae78cd3f x86jit: Fix a bug in branch continuing. 
When we predict it won't take a likely delay slot, we'd lose our register
allocation state.
 2014-10-12 12:51:47 -07:00
Unknown W. Brackets 2f598e8f38 jit: Statically jump for fixed branches. 
This handles both loops (first step is known) and static branches (some
code uses them instead of jumps, and we disassemble that to "b".)

Not likely to be a big improvement, but might help if the branch predictor
was wrong.

This is as opposed to continuing, which would build a larger jit block.
 2014-10-12 12:51:47 -07:00
Unknown W. Brackets 9228ac72da jit: Reorganize imm branch logic a bit. 2014-10-12 12:51:46 -07:00
Unknown W. Brackets 8d0dca71fe jit: Rename the rounding mode funcs to clarify. 
They apply/restore the value, set/clear is confusing.
 2014-10-12 11:35:20 -07:00
Unknown W. Brackets 925557ed47 x86jit: Maintain the rounding mode always. 
This should be less often than doing it per block that uses fpu, unless
the game doesn't use fpu much at all.
 2014-08-22 09:53:00 -07:00
Unknown W. Brackets dc91dc1ce8 x86jit: Support fpu rounding modes for mul, etc. 
Fixes Gods Eater Burst loading PSP savedata, but can no longer load old
savedata.
 2014-08-21 23:59:55 -07:00
Unknown W. Brackets d2e7dfcc51 Minor logging improvement. 2014-07-05 13:19:53 -07:00
Unknown W. Brackets 0078faef8b Fix some log semicolons that might affect logic. 
But, these should all be right.
 2014-06-29 19:09:38 -07:00
Unknown W. Brackets bc3d789c8a x86jit: Cache the vfpu compare flags in a reg. 
Again, to match armjit.
 2014-06-28 00:38:55 -07:00
Unknown W. Brackets acad2e1763 x86jit: Cache fpcond in a register. 
Mostly to match armjit.
 2014-06-28 00:38:55 -07:00
Unknown W. Brackets 05ab192c9c Reduce includes in Core/HLE/. 
Especially templates.
 2014-03-15 11:22:19 -07:00
Unknown W. Brackets 2347498667 x86jit: Use templates to avoid some void * casts. 
Makes it a bit cleaner and potentially safer.
 2014-01-18 09:57:13 -08:00
Henrik Rydgard 455a73bba7 Bugfix replace function inlining (compilerPC needs to be increased). Misc. 2013-12-20 15:37:37 +01:00
Henrik Rydgard 1cb7965cb1 Jit feature preparation: Introduce "proxy blocks". 
When these are invalidated, the block they point to gets invalidated too.

Will be useful to implement various types of block merging and function inlining
without affecting correctness of cache clears etc.

Also, with this commit we can now fully inline replaced functions. fabsf() boils
down to 1-2 instructions and the block continues, for example.
 2013-12-19 00:39:49 +01:00
Henrik Rydgard 1e300447e1 Fix some replace-related bugs. Add "jal" replace inlining, not activated. 2013-12-18 16:27:23 +01:00
Henrik Rydgard 2d8429ac48 Assorted cleanup in the MIPS emulation 2013-12-10 13:15:16 +01:00
Henrik Rydgård 980de339ce Fix buildfix: there shouldn't be a zero there at all. 2013-12-09 16:53:46 +01:00
Henrik Rydgård e76fc5e56c Clang 3.4 buildfix 2013-12-09 12:52:03 +01:00
Unknown W. Brackets 763eff181d Fix handling of jalr when delay slot changes rd. 2013-11-14 23:39:13 -08:00
Unknown W. Brackets a334aaf6ca x86jit: Refactor and skip flushes in branch cont. 
Still not faster, but at least the code isn't as messy.
 2013-11-12 00:45:28 -08:00
Unknown W. Brackets 7e19933f64 x86jit: Try predicting branch continues. 
Still doesn't seem to work.  Something like a 4% gain in Star Ocean was
the best I saw...
 2013-11-10 22:50:23 -08:00
Unknown W. Brackets bb960480c8 x86/armjit: Stop compiling on a jump to invalid. 2013-11-10 21:59:50 -08:00
Unknown W. Brackets fd38b10ab6 x86jit: Rename imm funcs to match armjit. 2013-11-10 21:59:49 -08:00
Unknown W. Brackets 359110f010 x86/armjit: Add jump following (off by default.) 
Inlines function calls up to a certain extent.  Allows us to get
immediates all the way to a syscall, for example, usually.

Not sure if faster.
 2013-11-10 21:59:49 -08:00
Unknown W. Brackets aacb31bc18 armjit: Copy over (disabled) immbranch optim. 
This does a little loop unrolling.  Costs a bit more cache space, but
avoids flushing regs for longer.

Not enabled.
 2013-11-10 21:59:48 -08:00
Unknown W. Brackets 1cc68f50ca armjit: Small optimization to syscall instr. 2013-11-10 14:38:10 -08:00
Unknown W. Brackets b30928036e armjit: Avoid flushing an imm in beq/bne/etc. 
We might be able to STMIA it instead.
 2013-11-10 14:38:10 -08:00
Henrik Rydgard 5ad04a23f4 x86 jit: Rename BindToRegister to MapReg 2013-11-09 15:23:31 +01:00
Henrik Rydgard 5a95e267fb Add an optimization to discard registers at the end of functions when possible. 
Works in some games but crashes many so hiding it for now. Do not add UI.
 2013-11-08 12:43:48 +01:00
Unknown W. Brackets 732ae13ebb Fast path CallSyscall where possible. 
It seems we're spending a decent amount of time there, which isn't
entirely unexpected.  We can eliminate some things easily.
 2013-11-04 07:59:37 -08:00
Unknown W. Brackets 2e8ef3027f Write the retaddr to rd, not always ra, in jalr. 
Thanks go entirely to @Kingcom for pointing this out.

Don't know of any games not using RA as the rd.
 2013-10-17 07:39:33 -07:00
Unknown W. Brackets c3839a53e5 Fix some minor warnings. 2013-09-07 22:40:08 -07:00
Unknown W. Brackets dc05051696 Add more reporting for cpu instructions. 2013-09-05 23:27:51 -07:00
Unknown W. Brackets 97aa1a631e Improve typesafety in the x86 regalloc. 2013-08-24 19:41:10 -07:00
Unknown W. Brackets 6c97b66806 Cap imm branch instructions, reset compiling. 
Break and other delay slot ops could've set it to false.

It's actually sometimes faster now.
 2013-08-24 17:26:24 -07:00
Unknown W. Brackets 109ad17ac6 Use a typesafe struct for opcodes. 
Also, correctly read delayslots using Read_Instruction on ARM.
 2013-08-24 15:36:24 -07:00
Unknown W. Brackets b37f09cedf Make MIPSInfo a struct for typesafety. 
Found a bug in ReadsFromReg().
 2013-08-24 13:22:10 -07:00
Unknown W. Brackets 9864c1cd8d Minor x86 jit branch tweak from arm. 2013-08-16 23:48:41 -07:00
Unknown W. Brackets 8327cd0f8e Clean up some inconsistency in jit branches on arm. 2013-08-16 02:02:56 -07:00
Unknown W. Brackets df32c99be6 Attempt to follow branches to a max # of ops. 
Seems to make it slower also.  Maybe taking the branch would be better...
hmmph.
 2013-08-16 01:07:11 -07:00
Unknown W. Brackets defd2b6383 Attempt at doing branches with imm args. 2013-08-16 01:05:52 -07:00
Unknown W. Brackets 6b0b5145e5 Clean up some inconsistency in jit branches. 2013-08-16 00:44:23 -07:00
Unknown W. Brackets 2758634a0f Avoid overhead calling __KernelIdle(). 
~1.8% improvement in Zettai Hero Project.
 2013-08-15 01:35:17 -07:00
Unknown W. Brackets df50e03146 Add a safety log for cases we don't handle right. 2013-08-14 23:14:25 -07:00
Unknown W. Brackets e639f8d15f Handle branches in VFPU delay slots better. 
Based on tests on a PSP, all branches are attempted.  The behavior is
technically undefined.

It seems to take the delay slot's target if they differ and both pass.
This is the behavior the interpreter has, but it's more work in jit.

Since only a couple games seem to do this, and clearly expect this
behavior, this fixes all known cases of #1926.
 2013-08-14 22:56:02 -07:00