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16,260 Commits 81 Branches 131 Tags
c2cf2bd97ebe2baf4cf083371db8f42afffb83f8
Commit Graph
7322 Commits
Author SHA1 Message Date
Henrik Rydgard 31961eace9 Color conv attempt 2. Start consolidating simple color conversion functions in a single header+cpp. 2015-04-08 22:52:46 +02:00
Henrik Rydgard fdf5c36865 Fix line endings of a few project files to be consistent. Hopefully will avoid the annoying merge issues in the future. 2015-04-08 22:52:45 +02:00
Unknown W. Brackets 9dc7f7c3a2 Correct > 8 args for HLE logging again. 
This time for real?  Arg, stupid mistake.
 2015-04-08 12:44:32 -07:00
Henrik Rydgård 050a7c1a85 Merge pull request #7667 from unknownbrackets/warnings 
Fix some warnings
 2015-04-08 21:21:08 +02:00
Unknown W. Brackets b2b20a6eee Correct an invalid format parameter. 2015-04-08 12:17:24 -07:00
Unknown W. Brackets 0847d46b79 Remove always-true condition. 
It was only for logging anyway, can't be that important.
 2015-04-08 12:15:41 -07:00
Unknown W. Brackets 8e8a18e9b5 Log read failures from hashmap too. 2015-04-08 12:10:45 -07:00
Unknown W. Brackets afe42fa505 Log an error if ftruncate() fails. 2015-04-08 12:08:46 -07:00
Henrik Rydgard 56a596d099 Fix line endings in some vcproj.filters files. Should prevent future annoying conflicts, althoug this one is ugly. 2015-04-08 20:58:04 +02:00
Unknown W. Brackets 3cb474047b Fix potential shift by negative number. 2015-04-08 11:57:59 -07:00
Unknown W. Brackets c0dde25e5a Set the sid on StreamInfo. 
It's not used anyway, but if we have it there it might be later.
 2015-04-08 11:57:58 -07:00
Unknown W. Brackets fc0788bc95 Avoid unpredictable behavior in error condition. 2015-04-08 11:57:57 -07:00
Unknown W. Brackets 53340056fd Remove some unreachable code. 
This wasn't being used, and the other path should be fine.
 2015-04-08 11:28:52 -07:00
Unknown W. Brackets b5bb07b12c Fix HLE logging for args > 8. 2015-04-08 00:55:49 -07:00
Henrik Rydgård 4ba1113119 Merge pull request #7665 from unknownbrackets/jit-minor 
Avoid some unlikely writes to $0
 2015-04-08 09:33:15 +02:00
Unknown W. Brackets ffb583e298 ARM64: Move files into MSVC project filter. 2015-04-07 22:27:20 -07:00
Unknown W. Brackets b0d291032d armjit Avoid cfc1/mfc1 to $0. 2015-04-07 18:30:36 -07:00
Unknown W. Brackets 7ce5841f30 jit: Avoid mfhi/mflo to $0. 2015-04-07 18:25:28 -07:00
Unknown W. Brackets 788b9d78f8 jit: Avoid a super unlikely write to zero. 2015-04-07 18:20:37 -07:00
Henrik Rydgård bc490e60ab Merge pull request #7661 from lioncash/false 
sceIo: Remove always false condition
 2015-04-06 23:29:52 +02:00
Henrik Rydgård 39be916d8a ARM64: More emitter/disasm 2015-04-06 18:13:44 +02:00
Henrik Rydgård 459ba28655 ARM64: SW skinning runs without crashing but is broken. 2015-04-06 18:13:44 +02:00
Henrik Rydgård f82b613371 ARM64 emitter/disasm: Implement ASIMD LDP/STP instructions 2015-04-06 18:13:42 +02:00
Henrik Rydgård a8c2d0945a ARM64: lwl: Pass INVALID_REG to be sure SCRATCH1 doesn't get overwritten... 2015-04-06 18:13:41 +02:00
Henrik Rydgård 013bbc71af ARM64: Fix DUP disasm, INS disasm 2015-04-06 18:13:40 +02:00
Henrik Rydgård a3db3ed5c1 ARM64 emitter: Fix UXTL/SXTL and friends. Add disasm. 2015-04-06 18:13:40 +02:00
Henrik Rydgård 853d6ea34b ARM64 emitter: Add FMLA/FMLS vector versions 2015-04-06 18:13:39 +02:00
Henrik Rydgård 065cd97dc2 ARM64: LLVM buildfix, some more disasm 2015-04-06 18:13:39 +02:00
Henrik Rydgård 13c9390c53 ARM64: Emitter fix, disable swl/swr/lwl/lwr again fully 2015-04-06 18:13:38 +02:00
Henrik Rydgård 95cd1478de Restore the x86 build. 2015-04-06 18:13:37 +02:00
Henrik Rydgård fbaffdceab Remove some outdated comments, minor stuff 2015-04-06 18:13:36 +02:00
Henrik Rydgard 0a70618f87 ARM64: Accurate floating point rounding. For some reason, FTZ doesn't seem to work though. 2015-04-06 18:13:36 +02:00
Henrik Rydgard 7d918c0ad8 ARM64: Just some disasm improvements 2015-04-06 18:13:35 +02:00
Henrik Rydgard ad3d539451 ARM64: Attempt at lwl/lwr/swl/swr. The first two don't work 2015-04-06 18:13:35 +02:00
Henrik Rydgard 44286a2b37 ARM64: Accurate float->int conversion with rounding mode. 2015-04-06 18:13:34 +02:00
Henrik Rydgard 4618275f99 ARM64: Add a few aliases to emitter. Disasm fixes. 2015-04-06 18:13:33 +02:00
Henrik Rydgard acf08eefa8 ARM64: Fix FCVTL, use it in v2hf 2015-04-06 18:13:33 +02:00
Henrik Rydgard 8eedcc7fb0 ARM64: Speedup fpu/vfpu load/stores too using "pointerification". Actually noticeable gain. 2015-04-06 18:13:32 +02:00
Henrik Rydgard ad648baa9c ARM64 regcache: Add support to "pointerify" registers. Use in load/store to cut down instructions. 2015-04-06 18:13:32 +02:00
Henrik Rydgard 0849e270ee ARM64: fmla encoding, more disasm 2015-04-06 18:13:31 +02:00
Henrik Rydgard 2780eef595 ARM64: Another couple of VFPU ops 2015-04-06 18:13:31 +02:00
Henrik Rydgard ca58f322e5 ARM64: Port over some missing VFPU instructions from ARM. Not much left now. 2015-04-06 18:13:30 +02:00
Henrik Rydgard f06e9a9d18 ARM64: Even more VFPU instructions 2015-04-06 18:13:30 +02:00
Henrik Rydgard 1b1ab73b0f ARM64: Enable some more VFPU instructions, some code cleanup 2015-04-06 18:13:29 +02:00
Henrik Rydgard 9c79831237 ARM64 emitter: Fix FP immediates 2015-04-06 18:13:29 +02:00
Henrik Rydgard 500ca94ab8 ARM64: Port over tons of VFPU code from ARM, leave most of it disabled. 2015-04-06 18:13:28 +02:00
Henrik Rydgard 8df8c210d1 ARM64: Start porting over VFPU stuff from ARM, fix regalloc bug 2015-04-06 18:13:28 +02:00
Henrik Rydgard 9a5a093105 ARM64 emitter/disasm: More scalar FPU instructions 2015-04-06 18:13:27 +02:00
Henrik Rydgard 6cb107d6fc ARM64: Fix LDP disassembly 2015-04-06 18:13:25 +02:00
Henrik Rydgard 34e61ab875 ARM64: More FPU instructions (int<->float convert), minor stuff 2015-04-06 18:13:25 +02:00