preserve-emulation/ppsspp
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37,476 Commits 84 Branches 131 Tags
c19aa05b60d3fb395fc950f93205e3bd223dcd9d
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7 Commits
Author SHA1 Message Date
Unknown W. Brackets a181f6d5b8 riscv: Add a comment for FMUL testing later. 2023-07-27 22:16:29 -07:00
Unknown W. Brackets ca7a520a19 riscv: Implement FMul. 2023-07-25 20:33:56 -07:00
Unknown W. Brackets 9a9b371856 riscv: Implement FSign using FCLASS. 2023-07-25 20:33:56 -07:00
Unknown W. Brackets 05360d5c7a riscv: Implement simplest float ops. 2023-07-25 20:33:56 -07:00
Unknown W. Brackets 7071884a47 riscv: Handle rounding mode and ctrl transfers. 2023-07-25 20:33:56 -07:00
Unknown W. Brackets c2da7d18bb riscv: Stub out more IR compilation categories. 2023-07-23 18:01:00 -07:00
Unknown W. Brackets bf7a6eb2cd riscv: Add jit for some initial instructions. 2023-07-23 18:01:00 -07:00