Commit Graph
202 Commits
Author SHA1 Message Date
Henrik Rydgård 9e41fafd0d Move math and some file and data conversion files out from native to Common.
Buildfixing

Move some file util files

Buildfix

Move KeyMap.cpp/h to Core where they belong better.

libretro buildfix attempt

Move ini_file

More buildfixes
2020-10-04 09:12:46 +02:00
Henrik Rydgård c5e0b799d9 Remove category from _assert_msg_ functions. We don't filter these by category anyway.
Fixes the inconsistency where we _assert_ didn't take a category but
_assert_msg_ did.
2020-07-19 20:33:25 +02:00
Henrik Rydgård dd948383af VFPU interpreter: Improve some error messages, after seeing a bad one in #10196. 2020-06-02 23:18:09 +02:00
Henrik RydgårdandUnknown W. Brackets f65a71d6d8 Compat: Option to use accurate dotprod for VMMUL.
Eliminates Tekken 6 leg shaking.
2019-08-05 11:44:52 -07:00
Unknown W. Brackets c1c869df27 interp: Implement software inverse square root. 2019-08-04 21:24:13 -07:00
Unknown W. Brackets 13278dc1f4 interp: Implement software sqrt to match PSP.
This matches the PSP's square root better.

Disabled by default using a compile-time flag.
2019-08-04 21:23:04 -07:00
Unknown W. Brackets ed4f0896db interp: Use vfpu_dot for vdet as well.
Improves test accuracy here too.  Also keep neg sign on NAN for vdiv.

Disabled by default via compile-time flag.
2019-08-04 21:21:21 -07:00
Unknown W. Brackets d2f7594dc5 interp: Use software dot in vcrsp/vqmul.
Disabled by default using a compile-time flag.
2019-08-04 21:19:23 -07:00
Unknown W. Brackets 39017ea200 interp: Use vfpu_dot for vavg, vfad, vhdp.
Disabled by default.
2019-08-04 21:16:51 -07:00
Unknown W. Brackets 4bff980d34 interp: Use software dot for better accuracy.
This gets some vdot/similar tests to give more accurate results compared
to hardware.  Also added flushing of zero and NaNs.

Currently disabled, only enabled with a compile-time flag.
2019-08-04 21:14:23 -07:00
Unknown W. BracketsandGitHub 510daa664f interp: Correct vsbn instruction.
Accidentally broken in f2be0cb.  Rarely used.
2019-07-07 22:58:54 -07:00
Unknown W. Brackets 732d344328 Common: Fix some unused ident and case warnings. 2019-06-22 13:22:12 -07:00
Henrik Rydgård a0dc85a9d7 Fix a bunch of inconsequential uninitialized variables 2019-06-18 00:18:40 +02:00
Henrik Rydgård 379113680c Fix static analysis warning about access outside array (d[ins] = s[ins * 4] * t[0]) 2019-06-18 00:17:43 +02:00
Unknown W. Brackets 3cb1c33fd9 interp: Fix dumb mistake in vtfm.
Had done final testing on this with a 2x2 matrix because it was simpler...

Fixes #12109.
2019-06-16 18:29:29 -07:00
Unknown W. Brackets ec7cffa847 interp: Handle vtfm/vhtfm prefixes properly. 2019-04-02 18:46:39 -07:00
Unknown W. Brackets 442d6450bb interp: Correct prefixes on vfad and vavg.
Including write mask, which didn't work before.
2019-04-02 18:46:39 -07:00
Unknown W. Brackets 5414c12a15 interp: Cleanup prefix/size in vcrsp/vqmul. 2019-04-02 07:12:34 -07:00
Unknown W. Brackets 58573cd4b4 interp: Handle invalid swizzle for vmin/vmax. 2019-04-02 07:08:33 -07:00
Unknown W. Brackets e8c060bb5f interp: Correct vwbn and vlgb size behavior. 2019-04-02 07:08:20 -07:00
Unknown W. Brackets 89dbfd7d5b interp: Better prefixes for vdiv/similar ops.
Turns out it does work, just uses the wrong slot like S/T after all.
These other ops must go through the a similar process.
2019-04-02 07:07:53 -07:00
Henrik RydgårdandGitHub 24cfad87d1 Merge pull request #11955 from unknownbrackets/vfpu-chunk6
Correct prefixes for several swizzled ops, use zero for invalid
2019-04-01 17:13:34 +02:00
Henrik RydgårdandGitHub b346142df8 Merge pull request #11954 from unknownbrackets/vfpu-chunk5
Fix prefix and size handling for vsbx, vsocp, and integer conv ops
2019-04-01 17:12:03 +02:00
Unknown W. Brackets 6f87987e7b interp: Correct prefixes on vdot/vhdp. 2019-03-31 17:12:21 -07:00
Unknown W. Brackets b24f84d1a2 interp: Handle prefixes on matrix init ops. 2019-03-31 17:11:24 -07:00
Unknown W. Brackets 59905de719 interp: Correct vsgn out of swizzle bounds. 2019-03-31 17:10:51 -07:00
Unknown W. Brackets 85ff32eed1 interp: Handle vsgn prefixing.
One could compare against 3 using this, it just generates zeros to compare
with.
2019-03-31 17:10:51 -07:00
Unknown W. Brackets b881a689c4 interp: Ignore high bit in vmfvc/vmtvc.
Both 0 and 128 read/write the S prefix, for example.
2019-03-31 17:09:55 -07:00
Unknown W. Brackets dffa238611 interp: Handle invalid swizzle in vsge/vslt. 2019-03-31 15:05:43 -07:00
Unknown W. Brackets dfd8094f21 interp: Implement vcrs prefixes and sizes.
It only makes sense as triple, but it can be used as quad/single/etc. and
has consistent and sane results.
2019-03-31 15:05:15 -07:00
Unknown W. Brackets fa7ac7bc64 interp: Correct simple vmov variant prefixing. 2019-03-31 15:01:28 -07:00
Unknown W. Brackets 01aebe54b9 interp: Correct vdet prefix handling. 2019-03-31 15:01:11 -07:00
Unknown W. Brackets cc58d0d3a3 interp: Correct prefixes in vsrt ops. 2019-03-31 15:00:12 -07:00
Unknown W. Brackets f2be0cb083 interp: Correct prefixes for vsbn/vsbz. 2019-03-31 13:52:59 -07:00
Unknown W. Brackets 175ceef583 interp: Cleanup vsocp size handling. 2019-03-31 13:52:07 -07:00
Unknown W. Brackets 4a2f8a74dc interp: Correct size handling for vi2x ops. 2019-03-31 13:51:12 -07:00
Unknown W. Brackets b75690787e interp: Correct swizzle on vx2i ops. 2019-03-31 13:51:12 -07:00
Unknown W. Brackets 68cdcba6c5 interp: Don't write lane 2 on single colorconv.
Not that it's valid to use the op with that size anyway.
2019-03-31 13:51:12 -07:00
Unknown W. Brackets 5736b1be2a interp: Correct some negative invalid zero cases.
In these cases, the input value wires to +0.  Also, transposed the values
in a comment (oops.)
2019-03-31 13:45:37 -07:00
Unknown W. Brackets aa998b815c interp: Force vscmp result of invalid to zero.
Some other ops do this, but mostly only that do plus or minus.
2019-03-31 13:41:48 -07:00
Unknown W. Brackets 5749ae09d0 interp: Correct vmfvc register behavior.
The target and source registers were completely wrong.
2019-03-31 13:41:48 -07:00
Unknown W. Brackets b2e024025f interp: Handle wrong sizes of vf2h/vh2f.
Probably not ever used, but they have consistent behavior.
2019-03-31 13:41:48 -07:00
Unknown W. Brackets aceb0a8244 interp: Correct vrnd prefix handling.
We don't match random values perfectly anyway, but at least we should vary
at the right times.
2019-03-31 13:41:48 -07:00
Unknown W. Brackets dfc2449f35 interp: Match actual vdiv prefix handling. 2019-03-31 13:41:48 -07:00
Unknown W. Brackets af3ed69144 interp: Mask moves to vfpu ctrl.
These bits of the registers can't be written.
2019-03-31 10:37:07 -07:00
Unknown W. Brackets 2a5d4e577d interp: Handle NAN more correctly in vscmp. 2019-03-31 10:37:07 -07:00
Unknown W. Brackets db28c61272 interp: Handle flush prefixes slightly better. 2019-03-31 10:37:07 -07:00
Unknown W. Brackets d40ac043d4 interp: Handle prefixes for Vmmov/Vmmul/Vmscl.
I doubt any actual code uses this, but we have some tricky VFPU bugs left,
so just trying for maximum accuracy in the interpreter.
2019-03-31 10:37:07 -07:00
Unknown W. Brackets 26b1368f7b interp: Handle vrot prefixes mostly correctly.
Still some issues with 1/2 results and negate on swizzle.
2019-03-31 10:37:07 -07:00
Unknown W. Brackets 8fd8dce185 interp: Use a helper to generate prefix consts.
This makes more logical sense that using the VFPU_SWIZZLE and VFPU_ABS
macros to select the constant, although that's how the bits work.
2019-03-31 10:33:26 -07:00