12 Commits

Include renames

Author	SHA1	Message	Date
Henrik Rydgard	bc9c3db303	Armjit: Add option for fastmem. Small optimization.	2013-01-11 17:25:54 +01:00
Henrik Rydgard	9b791b9953	More ARMJIT optimization	2013-01-11 15:22:31 +01:00
Henrik Rydgard	9dcdb6df90	Jit work! Shifts, 3-operand ops, turn O2 back on...	2013-01-10 01:20:25 +01:00
Henrik Rydgard	71652874c2	Fix jit bugs related to the dirty flag, and more: ... * Tweak block logging * Faster calls-to-interpreter.	2013-01-10 00:03:51 +01:00
Henrik Rydgard	2f4e6eaf01	Remove allocLock until we need it	2013-01-09 22:46:27 +01:00
Henrik Rydgard	dafe2c389c	More regalloc fixing and tweaks. Still not working the way I want it.	2013-01-09 13:38:44 +01:00
Henrik Rydgard	17210c5364	Generate immediates as rot+shift when possible.	2013-01-09 11:52:49 +01:00
Henrik Rydgard	dafc9f62df	Regcache fixes, etc. thing still don't work when I turn on addiu :(	2013-01-09 11:20:48 +01:00
Henrik Rydgard	81c6c4805d	Small dispatcher optimizations, cleanup. Still no cube.	2013-01-09 00:42:03 +01:00
Henrik Rydgard	8c06edc47b	It's getting close to the first totally unoptimized jit run.	2013-01-08 17:03:17 +01:00
Henrik Rydgard	b3fd1ff34c	Lots of various work on the ARM jit. It executes a couple of blocks now.	2013-01-08 13:49:52 +01:00
Henrik Rydgard	a2ff416534	Rename files. Rewrite ArmRegCache from scratch.	2013-01-07 22:33:09 +01:00