 Henrik Rydgard
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909b768f47
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Don't need separate variables for writemask. Some optimizations.
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2013-02-16 09:28:55 +01:00 |
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Unknown W. Brackets
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f95e66eb98
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Forget cached prefixes when calling generic.
It may eat them, or maybe always does?
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2013-02-15 08:35:34 -08:00 |
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Unknown W. Brackets
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ccad259ae5
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Keep track of VFPU prefixes and flush them in jit.
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2013-02-15 08:35:33 -08:00 |
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Henrik Rydgard
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78923f5538
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Jit a little more (vfpu single load/store, transfer instructions)
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2013-02-10 12:14:55 +01:00 |
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Unknown W. Brackets
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eb84c2f00a
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Validate jumps in jit slowmem mode.
This makes it easier to see what is going on in the emulator debugger.
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2013-02-09 23:11:26 -08:00 |
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Unknown W. Brackets
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71c85ccf33
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In jit slowmem, verify actual address.
Oops, it could crash if it was near the boundary.
Well, it still could if it were very near, but that's rare.
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2013-02-09 23:08:57 -08:00 |
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Unknown W. Brackets
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f777c872e6
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Jit unaligned reads/writes.
This mostly just improves perf on debug, not really on the map for release.
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2013-02-02 13:12:34 -08:00 |
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Unknown W. Brackets
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6d7a8d9b1a
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Apply the memview mask to jit immediates too.
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2013-01-26 23:54:43 -08:00 |
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Unknown W. Brackets
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a7b5433ba7
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Make sure fastmem isn't confused by rs changing.
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2013-01-26 23:18:50 -08:00 |
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Unknown W. Brackets
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a89d61463e
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Make the VFPU jit use far jumps for memory access.
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2013-01-26 23:08:19 -08:00 |
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Unknown W. Brackets
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0e8e9697c5
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Add lv.q/sv.q support to the x86 jit.
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2013-01-26 10:09:18 -08:00 |
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Unknown W. Brackets
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b77ce99d01
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Oops, no slow read for immediates usually.
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2013-01-26 09:27:52 -08:00 |
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Unknown W. Brackets
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9cd5836b85
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Rename WriteFinish() to Finish() is safe mem.
It's nothing to do with writing.
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2013-01-26 09:09:47 -08:00 |
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Unknown W. Brackets
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3e419f513a
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Refactor jit safe memory reads without dup code.
But, maybe too automagical...
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2013-01-26 08:42:34 -08:00 |
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Henrik Rydgard
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2738417040
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VFPU JIT: start setting up infrastructure. very incomplete. vdot works if undisabled, but isn't complete.
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2013-01-26 01:34:19 +01:00 |
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Henrik Rydgard
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68991511ee
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Split out the FPU reg cache into its own file too.
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2013-01-26 01:34:19 +01:00 |
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Unknown W. Brackets
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2eba209f64
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Move around the jit nice delay slot logic.
Nice delay slots don't not save flags, they run before the CMP.
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2013-01-24 07:31:51 -08:00 |
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Unknown W. Brackets
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0e33923844
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Belt and suspenders check for branch ops.
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2013-01-22 08:11:37 -08:00 |
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Unknown W. Brackets
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a9d0390426
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Adjust downcount before syscalls, not after.
This makes jit slightly slower for syscalls, but it's minor and makes
sure jit and interpreter timing are determistically the same.
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2013-01-21 22:57:53 -08:00 |
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Unknown W. Brackets
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566b7a0910
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A branch was missing inDelaySlot, refactor it.
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2013-01-21 22:45:07 -08:00 |
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Unknown W. Brackets
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c897e6446a
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Don't over decr downcount when hitting a jit bp.
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2013-01-21 19:41:12 -08:00 |
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Unknown W. Brackets
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776eb8ab2e
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Simplify CompileDelaySlot().
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2013-01-20 19:48:54 -08:00 |
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Unknown W. Brackets
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385417effe
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Log jit misses at runtime instead of compile time.
Really, it could be very different after all... this shouldn't be
all that slow, I guess.
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2013-01-19 20:11:17 -08:00 |
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Unknown W. Brackets
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75a3872923
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Log missed jit ops for poor man profiling.
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2013-01-19 19:58:25 -08:00 |
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Henrik Rydgard
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229d4e9f32
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Buildfix
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2013-01-19 13:10:52 +01:00 |
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Unknown W. Brackets
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11c5cdfdb0
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Refactor out all the CheckJitBreakpoint()s.
Ah, much cleaner.
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2013-01-18 21:33:23 -08:00 |
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Unknown W. Brackets
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40ae3dfe45
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Correctly break at branch points in x86 jit.
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2013-01-18 21:12:53 -08:00 |
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Unknown W. Brackets
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beac991a9e
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Clear jit cache when changing breakpoints.
For now, only when paused. I don't think clearing the cache while
running is an awesome idea.
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2013-01-18 20:12:53 -08:00 |
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Unknown W. Brackets
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a9293c8923
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Add breakpoints to x86 jit for easier debugging.
They should be really fast so leaving them on in release.
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2013-01-18 20:10:37 -08:00 |
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Henrik Rydgard
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674911ddba
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Move downcount into MIPSState for efficiency, enable block linking.
On ARM JIT we can now reach it through the cpu context reg.
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2013-01-12 00:44:18 +01:00 |
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Henrik Rydgard
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ea3055322c
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Oops
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2013-01-09 00:45:54 +01:00 |
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Henrik Rydgard
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8915677241
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More progress but it weirds out...
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2013-01-08 21:24:42 +01:00 |
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Henrik Rydgard
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a2ff416534
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Rename files. Rewrite ArmRegCache from scratch.
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2013-01-07 22:33:09 +01:00 |
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Henrik Rydgard
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6b64554e64
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Fix savestates under JIT
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2013-01-03 12:46:10 +01:00 |
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Henrik Rydgård
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d8da92befa
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Fix timing issue wiith JIT on non-Windows platforms
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2012-12-25 09:02:02 +01:00 |
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Henrik Rydgard
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64cc573703
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Switch to "GPL 2.0 or later" for various reasons. I wrote most of the code I imported from Dolphin (which is GPL2-but-not-later), so it should be OK.
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2012-11-04 23:24:00 +01:00 |
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Henrik Rydgard
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4f7ad15758
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Add snapshot of the whole source code.
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2012-11-01 16:19:01 +01:00 |
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