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2,333 Commits 76 Branches 131 Tags
b27701ac7d19d4672946e793ffe7ab15fb3c6921
Commit Graph
266 Commits
Author SHA1 Message Date
Unknown W. Brackets b27701ac7d Fix VDot returning -0.0 in x86 jit. 2013-02-16 10:37:42 -08:00
Unknown W. Brackets 1c4c5e718b Optimize VDot and VecDo3 to avoid temporaries. 2013-02-16 10:19:05 -08:00
Unknown W. Brackets 0bd382c518 Discard temp regs right away, some helper funcs. 2013-02-16 10:18:13 -08:00
Unknown W. Brackets 0d5da967eb Enable VDot and Vec3 in x86 jit. 2013-02-16 03:27:48 -08:00
Unknown W. Brackets 35537b3c97 Add TEMP0 fpu regs to x86 like in armjit. 
But... will probably need more and the ability to swap into memory
if we want to deal with prefixes.
 2013-02-16 03:27:03 -08:00
Unknown W. Brackets 1ef4ccc5a1 Log an error when vfpu swizzle is used badly. 2013-02-16 02:04:04 -08:00
Henrik Rydgard 37f998407b Replace "Core" with "Jit" in ini. Don't show Open dialog by default (use Ctrl+A or Ctrl+O to open it). 
Delete "Slightly Faster Interpreter".
 2013-02-16 09:49:33 +01:00
Henrik Rydgard 159f423135 VFPUutil style & simplification 2013-02-16 09:28:56 +01:00
Henrik Rydgard 909b768f47 Don't need separate variables for writemask. Some optimizations. 2013-02-16 09:28:55 +01:00
Unknown W. Brackets be8ddf12aa Don't go out of bounds applying vfpu swizzle. 2013-02-15 23:43:40 -08:00
Unknown W. Brackets b1f31f052e Apply prefixes on vscl to t. 
It seems to do so with bugs on a real PSP.
 2013-02-15 23:43:25 -08:00
Unknown W. Brackets e65e551f52 Fix VFPU D prefix handling for -0.0f. 2013-02-15 20:40:00 -08:00
Unknown W. Brackets e42e7bf22e Don't flush all regs in mfvc, just prefixes. 2013-02-15 09:50:07 -08:00
Unknown W. Brackets f95e66eb98 Forget cached prefixes when calling generic. 
It may eat them, or maybe always does?
 2013-02-15 08:35:34 -08:00
Unknown W. Brackets 2b441f1638 Initial implementation of jit vadd/vsub/vdiv/vmul. 2013-02-15 08:35:34 -08:00
Unknown W. Brackets b9506c9568 Minor cleanup for vdot in x86 jit. 2013-02-15 08:35:34 -08:00
Unknown W. Brackets ccad259ae5 Keep track of VFPU prefixes and flush them in jit. 2013-02-15 08:35:33 -08:00
Unknown W. Brackets f6f2927526 Add curlies around DISABLE/CONDITIONAL_DISABLE. 2013-02-15 08:35:33 -08:00
Unknown W. Brackets 4eca76e0cc Check for s/t/d prefix reg changes in jit. 2013-02-14 00:27:09 -08:00
Unknown W. Brackets 3b58cc27bd Oops, vfpu was missing CONDITIONAL_DISABLEs. 2013-02-14 00:27:09 -08:00
Unknown W. Brackets abe390e6f3 Add some checks for fpu/vfpu writing to $0. 2013-02-14 00:27:09 -08:00
Unknown W. Brackets 4789a8e5eb Oops, can't have CONDITIONAL_DISABLE here, no op. 2013-02-14 00:27:08 -08:00
Unknown W. Brackets b0690f6ab8 Enable Comp_VPFX. 2013-02-14 00:27:08 -08:00
Unknown W. Brackets f1386dfca1 Add a quick optimization to the x86 fpu comps. 2013-02-13 02:21:26 -08:00
Unknown W. Brackets 19cc652a37 Correct NaN handling in fpu comparisons. 2013-02-13 01:54:07 -08:00
Unknown W. Brackets 3cab6986c5 Jit the FPU comparisons on x86. 
Probably not too fast.  Also, NaN handling seems wrong?
 2013-02-13 00:55:10 -08:00
Henrik Rydgard 2c01b36585 Some FPU optimization 2013-02-12 00:58:31 +01:00
Henrik Rydgard 3ce4a8a719 Allow switching 2xSSAA on and off ingame. Add Show FPS menu option. 2013-02-11 19:02:38 +01:00
Henrik Rydgård 815d69af44 Merge pull request #642 from Xele02/qt_work 
[Qt-desktop] Add debug dialogs
 2013-02-10 13:07:10 -08:00
Unknown W. Brackets 7c428bfeba Fix immediate div CMP. 2013-02-10 10:02:55 -08:00
Unknown W. Brackets e0ebfd2211 Jit div/divu in x86. 2013-02-10 09:36:41 -08:00
Unknown W. Brackets 9bb78ce2ec Jit madd/msub in x86. 2013-02-10 08:45:35 -08:00
Xele02 69b837f18b Add debug dialogs (DisAsm, Memory, VFPU). 
New features : Breakpoint display, thread status, display list status
Update translation and start french translation
 2013-02-10 17:33:34 +01:00
Henrik Rydgard 78923f5538 Jit a little more (vfpu single load/store, transfer instructions) 2013-02-10 12:14:55 +01:00
Unknown W. Brackets eb84c2f00a Validate jumps in jit slowmem mode. 
This makes it easier to see what is going on in the emulator debugger.
 2013-02-09 23:11:26 -08:00
Unknown W. Brackets 71c85ccf33 In jit slowmem, verify actual address. 
Oops, it could crash if it was near the boundary.
Well, it still could if it were very near, but that's rare.
 2013-02-09 23:08:57 -08:00
Henrik Rydgard 6d3c851d03 armjit: Fix and enable sltiu, correct this time I think... 2013-02-06 23:35:24 +01:00
Henrik Rydgard 377c94b125 JIT x86: cvt.s.w 2013-02-06 20:29:49 +01:00
Lewis Robbins 442e64cd84 compiler warning and const top-level const 2013-02-05 17:54:29 +00:00
Unknown W. Brackets 2a6457b6ab Cut down on h files including PointerWrap. 
This makes changes to it a bit faster to build.
 2013-02-04 08:26:59 -08:00
lioncash 025a1351b4 Get rid of unused iterators. 
Also fix the formatting in 3 sprintf calls.
 2013-02-04 08:49:58 -05:00
Henrik Rydgard 7a22b4694b Prefixes are allowed on vcst, not that it makes much sense to use them. 2013-02-03 09:47:56 +01:00
Henrik Rydgård b7cf57b79c Merge pull request #568 from unknownbrackets/jit-minor 
Jit: lwl/lwr/swl/swr, shift var
 2013-02-02 15:46:40 -08:00
Henrik Rydgard d44c5bff45 Add some stubs to remember to implement these VFPU ops... 2013-02-02 23:48:22 +01:00
Unknown W. Brackets 6bee870ac9 Fix CompShiftVar for x86 jit. 
In case rd == rs, need to load ECX first.  I can't find anything
else wrong with it for it to be disabled.
 2013-02-02 14:02:07 -08:00
Unknown W. Brackets f777c872e6 Jit unaligned reads/writes. 
This mostly just improves perf on debug, not really on the map for release.
 2013-02-02 13:12:34 -08:00
Unknown W. Brackets bab7947be6 Read delay slots as instructions not mem. 
Just in case - could be a jump target, maybe?  Never seen it, though.
 2013-02-02 11:46:35 -08:00
Unknown W. Brackets 44b5adeaac Properly jit the break instruction. 
Otherwise, it just keeps on going past it.
We never want to hit this anyway, but it's good to know if we do.
 2013-02-01 00:49:14 -08:00
Sacha 7bba8c68c4 Fix JIT on Symbian (HACK). 2013-02-01 09:01:00 +10:00
Henrik Rydgard d8f4e27926 Rename ARMABI_MOVI2R to MOVI2R 2013-01-31 23:41:05 +01:00