Henrik Rydgård
0829543987
Third part of getting rid of PanicAlert
2020-07-19 20:34:02 +02:00
Henrik Rydgård
47a3bf1dd7
Step 2 of removing PanicAlert
2020-07-19 20:34:02 +02:00
Henrik Rydgård
c5e0b799d9
Remove category from _assert_msg_ functions. We don't filter these by category anyway.
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Fixes the inconsistency where we _assert_ didn't take a category but
_assert_msg_ did.
2020-07-19 20:33:25 +02:00
Henrik Rydgard
c988d42b04
ARM/ARM64 instruction analysis, hook up to handler
2020-07-14 09:25:45 +02:00
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ae224b3893
jit: Add some basic checks in armjit/arm64jit.
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Just the simple (and unlikely) case so far...
2020-07-13 01:49:19 -07:00
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b3bf61dde1
x86jit: Trigger exec exceptions.
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A common case might be, you're hacking something in the game and you broke
the stack, so you `jr ra` into outer space.
2020-07-12 22:40:25 -07:00
Henrik Rydgård
efc3f4f5e4
Split CORE_ERROR into CORE_BOOT_ERROR and CORE_RUNTIME_ERROR
2020-07-12 15:25:20 +02:00
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7910b4029a
arm64jit: Track writable and non-writable pointers.
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Switch uses different memory regions. We can handle this, might as well
cleanup some const abuse.
2020-05-17 00:15:12 -07:00
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5afc020fbd
x86jit: Force INF * 0 to +NAN.
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See #12519 - this is needed for some graphics to render properly. Seems
to already happen on ARM, so no change to armjit.
2020-04-06 06:33:39 -07:00
Henrik Rydgård
31de5a5082
Improve an assert message that AkiraJkr saw. Fix a silly bug in the last commit.
2019-08-23 18:42:10 +02:00
Henrik Rydgård
f65a71d6d8
Compat: Option to use accurate dotprod for VMMUL.
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Eliminates Tekken 6 leg shaking.
2019-08-05 11:44:52 -07:00
Henrik Rydgård
7853c90abb
JIT: Split VFPU_MTX disable options. To help with #9843
2019-06-03 23:28:15 +02:00
Henrik Rydgård
55b4b4b9e3
Style fix
2019-06-02 16:22:19 +02:00
Henrik Rydgård
6fd40332fd
JitDisable: Add option to disable regalloc across instructions (flush after every instruction)
2019-06-02 16:06:10 +02:00
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a5214d0b1a
Jit: Ignore high bit in vmfvc/vmtvc.
2019-03-31 17:09:55 -07:00
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5749ae09d0
interp: Correct vmfvc register behavior.
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The target and source registers were completely wrong.
2019-03-31 13:41:48 -07:00
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d5273f589a
interp: Mask value in vpfxd.
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The actual register ends up with only the lower 12 bits, which makes sense
since those are the only ones that do anything.
2019-03-31 08:23:36 -07:00
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6178a1fb33
Jit: Correct vocp prefix handling.
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See #5549 . Matches tests for various prefix settings.
2019-02-23 09:15:26 -08:00
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419c1fbd73
Jit: Respect flags for jit types and features.
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Left some free space for more.
2019-02-03 14:57:08 -08:00
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b2cc4a0965
Debugger: Add memory breakpoint management.
2018-06-08 06:59:18 -07:00
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4c3fe47372
jit: Remove unused breakpoint code.
2018-06-06 17:31:56 -07:00
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eb4b59b530
arm64jit: Enable breakpoints.
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Memory breakpoints not yet really tested.
2018-06-06 17:31:56 -07:00
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ab809bd19e
jit: Apply hasSetRounding at compile time.
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Otherwise, the block will be executed with the wrong rounding mode the
first time rounding is set. This could be important if it was set for a
single operation.
This is only a problem the first time it's set.
2018-04-01 10:36:16 -07:00
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09e307b097
arm64jit: Update rounding mode on thread switch.
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Since fcr31 is per-thread, we must update jit state when it changes.
This also fixes the rounding mode on load state and jit/interp switch.
2018-04-01 10:12:32 -07:00
Henrik Rydgård
468b830bec
Show IR disassembly in JIT Compare screen
2018-01-04 12:23:23 +01:00
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8ffb0101fe
jit: Report blocks with uneaten VFPU prefixes.
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There may be options to avoid, like continuing these blocks, especially if
they're likely or something.
2018-01-01 08:38:10 -08:00
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48fe0168f1
x86jit: Fix safemem on WX exclusive.
2017-12-28 11:21:45 -08:00
Henrik Rydgård
c55847a79e
Fix typo causing #10408
2017-12-14 00:23:07 +01:00
Henrik Rydgård
0207739d76
Can't call functions through known-nil pointers, even if they don't touch local data - LLVM's optimizer might have done something stupid.
2017-11-30 01:07:03 +01:00
Henrik Rydgård
bd8067a631
Reduce a ERROR_LOG_REPORT to a warning (vfpu branches in delay slots)
2017-11-11 19:39:44 +01:00
Henrik Rydgård
22e65ba80d
Get rid of ugly alignment macros and some other cruft, we now have alignas(16) from C++11
2017-08-31 01:14:51 +02:00
Henrik Rydgård
884aef6603
SafeMem: Remove the "far" optimization that saves 3 bytes sometimes but is really dangerous and not worth the complexity.
2017-08-30 09:58:30 +02:00
Henrik Rydgård
8d0498303a
Fix a PIC compliance bug in the VFPU. Comment other cases properly (for easy searching).
2017-08-29 11:45:12 +02:00
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3dacd323c8
x64: Avoid clobbering jr dest in cases.
2017-07-08 16:40:06 -07:00
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79a6690a30
x64: Fix coreState rip checks.
2017-07-08 16:39:26 -07:00
Henrik Rydgård
8d86463b1a
More RIP fixes
2017-07-07 15:46:14 +02:00
Henrik Rydgård
837118d230
More RIP elimination
2017-07-07 15:07:56 +02:00
Henrik Rydgård
86396ba39b
Turning off the "close memory finder" lets us find more RIP addressing...
2017-07-07 15:07:53 +02:00
Henrik Rydgard
8872057a2d
x86-64: Linux ABI fix
2017-07-07 14:22:35 +02:00
Henrik Rydgård
dad5ca45f2
Delete some unnecessary loads. These loads are done properly inside trigCallHelper.
2017-07-07 14:15:10 +02:00
Henrik Rydgård
d312086a61
32-bit fixes
2017-07-07 13:57:37 +02:00
Henrik Rydgård
e5a7d0df95
Buildfix for platforms with standards-compliant offsetof (no dynamic indexing allowed)k
2017-07-07 12:59:23 +02:00
Henrik Rydgård
ecbeee5225
RegCacheFPU
2017-07-07 11:33:07 +02:00
Henrik Rydgård
758cbd748e
Replace vminmax_sreg with mips->temp
2017-07-07 11:33:07 +02:00
Henrik Rydgård
270001e651
vminmax_sreg only needs a single element
2017-07-07 11:33:07 +02:00
Henrik Rydgård
567937fa4d
x64: Enable non-RIP addressing for FPU registers
2017-07-07 11:33:07 +02:00
Henrik Rydgård
077fafba64
Get rid of sincostemp global. Solution not tested on linux yet.
2017-07-07 11:33:06 +02:00
Henrik Rydgård
cfa7c61651
More RIP removal. Also add some comments to make it easy to just search for "M(&" to find remaining offenders.
2017-07-07 11:33:06 +02:00
Henrik Rydgård
0645677fea
Access FPU temps through CTXREG
2017-07-07 11:33:06 +02:00
Henrik Rydgård
752254d404
Surprise! More. Making many commits for easier bisects.
2017-07-07 11:33:06 +02:00
Henrik Rydgård