preserve-emulation/ppsspp
1
0 Fork 0
mirror of https://github.com/hrydgard/ppsspp.git synced 2026-11-07 06:44:29 +01:00
Code Issues Packages Projects Releases Wiki Activity
16,666 Commits 76 Branches 131 Tags
abc0f88a550fc2217841c6947b8fa70a5a159513
Commit Graph
1633 Commits
Author SHA1 Message Date
Unknown W. Brackets 9262ddfc13 Avoid any possible shifts by 32. 2015-07-19 13:25:50 -07:00
Unknown W. Brackets cd842ac21f Validate blocklinking in icache invalidate all. 
Normally blocks are invalidated on entry.  But when blocklinking is on,
we don't validate on all entries.

This fixes Tales of Rebirth crashes (#7868.)
 2015-07-19 13:08:32 -07:00
Unknown W. Brackets 96b01e4999 Make sure we don't clean up proxy blocks. 2015-07-19 13:04:06 -07:00
Henrik Rydgard 47f68ae3a3 ARM64 store optimization bugfix 2015-07-16 00:25:32 +02:00
Henrik Rydgard aaa8350591 Windows: Fix some remaining ASLR issues 2015-07-15 22:25:24 +02:00
Henrik Rydgard ccd77cfb7a ARM64 stores: Use WZR for any zero immediates. 2015-07-15 20:01:36 +02:00
Henrik Rydgard 8b05e27259 ARM64 regalloc: Map more registers 2015-07-11 23:53:06 +02:00
Henrik Rydgard 9fe382ad18 ARM64: Shortcut moves between gpr and vfpu when not mapped 2015-07-11 23:53:06 +02:00
Henrik Rydgard 56f9aaa164 ARM64: Store zeroes using WZR 2015-07-11 23:53:05 +02:00
Henrik Rydgård 1ba2b1cfae Merge pull request #7855 from hrydgard/static-alloc 
ARM64 jit: Statically allocate a few registers, including SP
 2015-07-11 18:13:47 +02:00
Henrik Rydgard 2e937b2d10 use the DiscardR function. Remove an old TODO 2015-07-11 17:17:54 +02:00
Henrik Rydgard b73920fcba ARM64: Cleanups in regcache and jit 2015-07-11 17:00:01 +02:00
Henrik Rydgard 444fc0885c Fix the crash bug (need to mark static non-pointer regs as depointerified on flush) 2015-07-11 16:59:14 +02:00
Henrik Rydgard 2a8560e522 ARM64: Another pair of fixes for static alloc. Still crashes in many games... 2015-07-11 16:59:14 +02:00
Henrik Rydgard d1bbc1d3c0 More regcache fixes. ML_IMM works now although there is another stability issue somewhere. 2015-07-11 16:59:13 +02:00
Henrik Rydgard 568e2abb2b Save/load static registers around replacement funcs 2015-07-11 16:59:13 +02:00
Henrik Rydgard 1b8549b26f Couple more regcache fixes 2015-07-11 16:59:12 +02:00
Henrik Rydgard 4920f3e3c1 Work towards handling ML_IMM in static registers but doesn't work yet (enable on line 649) 2015-07-11 16:59:11 +02:00
Henrik Rydgard f42f81a4da ARM64: Optimize small adjustments of pointerified registers 2015-07-11 16:59:11 +02:00
Henrik Rydgard 9af6abd8a1 ARM64: Support pointerified static allocs, statically allocate SP 2015-07-11 16:59:10 +02:00
Henrik Rydgard 844a3f19a9 Fix bugs and issues in ARM64 static alloc. Thanks unknown for finding the problem. 2015-07-11 16:59:09 +02:00
Henrik Rydgard a0bf934796 ARM64: Some work on static allocation. Close to working, cube.elf runs 700 blocks but then hangs (?!) 2015-07-11 16:59:09 +02:00
Henrik Rydgard 698ef82452 ARM64: Fix vrot 2015-07-11 16:56:26 +02:00
Henrik Rydgard 9937b41461 ARM64: Fix vi2uc and vi2us and enable them. 2015-07-11 16:46:11 +02:00
Henrik Rydgard dc2f6a30fb ARM64: Fix joining of lwl/lwr and swl/swr. "implement" the cache instruction. 2015-07-11 16:25:22 +02:00
Henrik Rydgard 1575025b3d ARM64: Store back fp registers in pairs where possible 2015-07-11 13:52:46 +02:00
Henrik Rydgard 35c65973c1 ARM64 jit: implement vuc2i, vc2i, vus2i, vs2i instructions 2015-07-11 13:25:58 +02:00
Henrik Rydgard 4a7ee6d6cd ARM64 jit: Implement vi2uc, vi2c, vi2us, vi2s instructions 2015-07-11 12:37:23 +02:00
Henrik Rydgard f50828a66a ARM32 JIT: Implement vs2i, vus2i, vc2i (but not vuc2i) 2015-07-11 00:37:57 +02:00
Henrik Rydgard cd1665e8f6 ARM32 jit: Implement vi2s, vi2c (but not the unsigned variants yet). uses the new shifts from the last commit 2015-07-09 00:27:12 +02:00
Henrik Rydgard a3b728dd1b ARM64 jit: Minor optimization of lv.q and sv.q 2015-07-08 11:59:48 +02:00
Henrik Rydgård f3c5af570c Merge pull request #7849 from unknownbrackets/arm64-micro 
Fix discarding imms and flushing zero in arm64
 2015-07-05 21:11:28 +02:00
Unknown W. Brackets db3dffb44d arm64: Oops, fix flushing zero from an armreg. 2015-07-05 11:57:18 -07:00
Unknown W. Brackets 204c1dc8dd arm64: Optimize 3ops against zero. 2015-07-05 09:52:53 -07:00
Henrik Rydgard 7011758e83 Move misplaced FlushIcache() in Arm64Asm.cpp 2015-07-05 10:03:52 +02:00
Unknown W. Brackets 003668fe66 armjit: Fix discarding imms. 2015-07-04 07:30:32 -07:00
Unknown W. Brackets 8ea7f99072 arm64: Fix imm wasting when STP doesn't work out. 2015-07-04 07:09:47 -07:00
Unknown W. Brackets e6a7ba3fae arm64: Bring imms along for the STP ride. 2015-07-03 16:51:33 -07:00
Unknown W. Brackets ca1e482a56 arm64: Avoid setting a reg to zero to store it. 2015-07-03 16:05:25 -07:00
Henrik Rydgård 82c66bc463 Merge pull request #7840 from unknownbrackets/arm64-micro 
Flush using STP where possible in ARM64
 2015-07-03 23:20:43 +02:00
Unknown W. Brackets 8fdceba7ca Add timing for all the basics. 
This way we can see overall stats for a frame.
 2015-07-03 12:05:08 -07:00
Unknown W. Brackets 90b7d135cb arm64: Flush in pairs if possible. 
On an A57, this is around twice as fast (for just the STR/STR vs STP.)
 2015-07-03 11:07:09 -07:00
Unknown W. Brackets ddb955a527 arm64: Try to optimize imm stores. 
If we already have a reg, we can use it.  This can happen when immediate
addresses are loaded and used as bases, although it's not super common.
 2015-07-03 10:48:11 -07:00
Unknown W. Brackets 2331df8c70 arm64: Try to be more consistent in ZERO handling. 
Let's keep it IMM where possible, even though we've added checks for
MIPS_REG_ZERO.
 2015-07-03 10:21:24 -07:00
Unknown W. Brackets 66d85233b9 arm64: Flush only caller-saved regs before calls. 2015-07-03 10:09:43 -07:00
Unknown W. Brackets 66adc4e695 jit: Normalize CONDITIONAL_DISABLE formatting. 2015-07-02 20:31:37 -07:00
Unknown W. Brackets fed687fb59 arm64: Meld LO and HI together for multiplies. 2015-07-02 20:31:37 -07:00
Unknown W. Brackets 1d1c80d9cf arm64: Use BFI for cfc1. 2015-07-02 20:31:35 -07:00
Unknown W. Brackets 757a1a414a arm64: Workaround an apparent gcc bug. 
Only seems to happen with unsigned.  This took a while to track down...
 2015-07-02 19:59:38 -07:00
Unknown W. Brackets e94fd3d4bd arm64: Fix div/divu remainders. 
Erp, I transposed the args when I pasted them.
 2015-06-28 16:52:49 -07:00