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Code Issues Packages Projects Releases Wiki Activity
33,798 Commits 78 Branches 131 Tags
95d40cc09f86152b6ef6f00a09bc062cd3f5de67
Commit Graph
2270 Commits
Author SHA1 Message Date
Herman SemenovandGitHub 29b87e0c0b Merge branch 'master' into master 2022-10-03 07:49:13 +00:00
Unknown W. Brackets ac335ad61a armips: Update to UTF-8/c++17 armips. 2022-09-30 19:48:14 -07:00
Unknown W. Brackets c49b91c62b armips: Update to latest. 2022-09-30 17:47:43 -07:00
lainon 3cdf72b68b Better readability and optimization insertion into container by replacing 'insert' -> 'emplace', 'push_back' -> 'emplace_back' 2022-09-30 12:35:28 +03:00
lainon b304551747 Code readability, vec reserve() and remove excess c_str() 2022-09-30 12:31:32 +03:00
lainon fec708489a Correct cleaning string and remove unused vars 2022-09-30 12:26:30 +03:00
Unknown W. Brackets f75dadd1d6 arm64jit: Handle branch/jump in branch delay slots. 2022-09-03 21:04:54 -07:00
Unknown W. Brackets bac36df453 x86jit: Refactor and fix jump in branch delay slot. 
This seems cleaner, instead of the duplication of lines for each branch
type.
 2022-09-03 19:58:46 -07:00
Unknown W. Brackets d08ee44cf4 irjit: Handle branch/jump in branch delay slots. 
See #15952 for more detail.
 2022-09-03 19:05:31 -07:00
Unknown W. Brackets 0fc3619d1d interp: Handle jumps in branch delay slots better. 
This matches tests from a PSP-2000.  Seems to consistently run the
instruction even if likely, which writes rd.

If the likely branch is not taken, the jump in the delay slot is taken.
However, it should cancel the rd write (not implemented here.)
 2022-09-03 13:15:21 -07:00
Unknown W. Brackets 8e7847f6d9 UI: Show return address for exec crashes. 2022-08-21 14:49:34 -07:00
Unknown W. Brackets 80e481bbdc Core: Show exception on misaligned jump. 2022-08-21 14:49:34 -07:00
Unknown W. Brackets 90517ace59 irjit: Validate alignment in slow memory mode. 2022-08-21 13:24:10 -07:00
Unknown W. Brackets 6715f41410 irjit: Add constructs for validing mem access. 
Basically to allow slow/fast memory to work with IR, including for
alignment checks.
 2022-08-21 13:01:23 -07:00
Unknown W. Brackets 7b081a61c8 irjit: Correct another PurgeTemps case. 
In this case:
  Mov A, B
  AndConst A, A, 1
  Load32 C, A, 0

Was still swapping the Load32 to B, not just the AndConst.

Fixes #15735.
 2022-07-27 19:38:16 -07:00
Unknown W. Brackets 5abf1362a2 irjit: Clarify PurgeTemps, guard a couple ops. 
Although I think we skip simplify passes on breakpoints entirely, safer to
exclude these ops.
 2022-07-27 19:36:53 -07:00
Unknown W. Brackets 2154f747fc irjit: Simplify more arithmetic to Movs. 
Later passes rely on things being Mov, so better to have them more often.
 2022-07-24 11:35:54 -07:00
Unknown W. Brackets 8f23025209 irjit: Add tests for IR passes. 2022-07-24 11:35:54 -07:00
Henrik Rydgård e6403d7157 Split GetPointer into two versions, to help with const correctness 2022-07-24 13:26:19 +02:00
Unknown W. Brackets c2a1caa2a2 irjit: Prevent corruption on purge temps pass. 
If a switch occurs and then something clobbers the dest of that switch, we
were wiping out the first of those three instructions incorrectly.
 2022-07-21 09:06:37 -07:00
LunaMoo 4b959c6b54 Add Zettai Zetsumei Toshi 3 bypass for softlock on character select screen 2022-07-14 23:17:32 +02:00
Unknown W. Brackets 25e18195ce irjit: Allow unaligned loads by default. 
This was the original intention, was a mistake that this was flipped.
 2022-07-11 17:36:39 -07:00
Henrik RydgårdandGitHub d2002eab39 Merge pull request #15640 from LunaMoo/master 
Disable ForceMax60FPS for GOW games and replace it with fixed 60 fps
 2022-07-10 23:25:35 +02:00
Unknown W. Brackets 74efce2d00 interp: Fix constant typo. 2022-07-04 17:31:12 -07:00
LunaMoo 5a06776999 Change hack names and edit comments based on feedback. 2022-07-04 00:58:48 +02:00
LunaMoo 1da9cd933b Test hack that breaks the vortex timer, it's still wrong 2022-07-03 04:23:26 +02:00
LunaMoo 0dcf8242f5 Add Fixed60FPShack for GOW, should work smoother than the ForceMax60FPS. 
Also more stable than it's CWCheat version, unfortunately because of that,
still causes softlock in GOW:GOS vortex stage.
 2022-07-02 19:39:35 +02:00
Henrik Rydgård cd92151de7 Add ARM64_NEON compile arch flag 
This allows doing ARM64 builds without NEON support, and allows simplifying some checks.
 2022-06-25 07:29:20 +02:00
Unknown W. Brackets 925a6d0ae1 GPU: Hook Sol Trigger func to flush texture. 
This makes sure the hardware renderer reuploads a texture modified during
stall, which they normally skip as an optimization (see #10967, #9449.)
 2022-05-22 11:44:49 -07:00
Henrik Rydgård 1bbaba4103 Fix some NEON code that had bad compile-time checks (and some didn't compile) 2022-04-15 00:54:44 +02:00
Henrik Rydgård 584e94f01e ARM32: Remove a lot of non-NEON fallback paths 2022-04-13 11:44:55 +02:00
Unknown W. Brackets 16dca4f69b x86jit: Use BMI2 for variable shifts. 
We don't actually regalloc ECX, but this still saves a copy, and on modern
CPUs these seem to be pretty fast.
 2022-01-31 19:38:17 -08:00
Unknown W. Brackets 2479d52202 Global: Reduce includes of common headers. 
In many places, string, map, or Common.h were included but not needed.
 2022-01-30 16:35:33 -08:00
Unknown W. Brackets 3df6cb704f Global: Fix some type conversion warnings. 
Hidden by some warning disables.
 2022-01-30 16:09:33 -08:00
Unknown W. Brackets 48b597a1b9 Display: Move core counters/stats to HW file. 
This separates things better, so not everything is pulling in HLE.
 2022-01-30 11:53:48 -08:00
Unknown W. Brackets 8573c34f85 x86jit: Check CALL dist for safe memory funcs. 2022-01-22 00:14:15 -08:00
Henrik RydgårdandGitHub 2c38a14ad6 Merge pull request #15243 from unknownbrackets/icache-hash 
jit: Use a hash for invalidate/clear all
 2021-12-19 20:59:56 +01:00
Unknown W. Brackets 00f9707399 jit: Use a hash for invalidate/clear all. 
This should make sceKernelICacheClearAll() more useful.
 2021-12-19 10:40:33 -08:00
Unknown W. Brackets db2eddcf27 Debugger: Remove double debug window updates. 
Core_EnableStepping() is already marking the debug windows for update,
there's no need to call SetDebugMode() again.
 2021-12-12 11:24:03 -08:00
Henrik RydgårdandGitHub 3ece12bb64 Merge pull request #15228 from unknownbrackets/vrndf 
Correct vrndf2 range
 2021-12-12 08:46:35 +01:00
Unknown W. Brackets 63e623ecb2 Build: Fix some format truncation warnings. 
Generally all should be safe already, but better to be sure.
 2021-12-11 10:45:27 -08:00
Unknown W. Brackets de2481f367 interp: Correct vrndf2 range. 
This seems more likely to be how the hardware works, given the range of
values.
 2021-12-11 10:18:12 -08:00
Unknown W. Brackets b8ab7f39df jit: Lock around changes to the jit pointer. 2021-11-28 10:04:22 -08:00
Unknown W. Brackets 0c6c2fb47a jit: More atomically update pointer. 2021-11-27 06:00:18 -08:00
Henrik Rydgård fdacf751ce NEON/SSE-optimize some matrix multiplications used by software transform 
Will hopefully reclaim any potential speed loss from the recent
refactor.
 2021-10-31 13:36:34 +01:00
Unknown W. Brackets 2bd13c5d9d Debugger: Track reason for entering stepping. 2021-10-23 16:56:15 -07:00
kotcrab 450d0ef015 Remove .s suffix from vwbn disassembly 2021-09-27 22:42:10 +02:00
kotcrab 7a124d84ae Fix disassembly of vcst 2021-09-25 19:34:41 +02:00
kotcrab 4bdba8ae6f Fix disassembly of vmfvc and vmtvc 2021-09-25 16:33:07 +02:00
Unknown W. Brackets 529329785b interp: Prevent crash on bad lv.q or sv.q addr. 
See #5496.
 2021-09-02 07:18:49 -07:00