12 Commits

Include renames

Author	SHA1	Message	Date
Unknown W. Brackets	b0d291032d	armjit Avoid cfc1/mfc1 to $0.	2015-04-07 18:30:36 -07:00
Henrik Rydgard	0a70618f87	ARM64: Accurate floating point rounding. For some reason, FTZ doesn't seem to work though.	2015-04-06 18:13:36 +02:00
Henrik Rydgard	44286a2b37	ARM64: Accurate float->int conversion with rounding mode.	2015-04-06 18:13:34 +02:00
Henrik Rydgard	8eedcc7fb0	ARM64: Speedup fpu/vfpu load/stores too using "pointerification". Actually noticeable gain.	2015-04-06 18:13:32 +02:00
Henrik Rydgard	34e61ab875	ARM64: More FPU instructions (int<->float convert), minor stuff	2015-04-06 18:13:25 +02:00
Henrik Rydgard	25ec85551f	ARM64: Implement FP compares, misc	2015-04-06 18:13:22 +02:00
Henrik Rydgard	5dff3f8c89	ARM64: Implement scalar FMOV. This makes the FPU2op ops work.	2015-04-06 18:13:16 +02:00
Henrik Rydgard	4233921ab7	ARM64: Some more instructions, func replacements	2015-04-06 18:13:16 +02:00
Henrik Rydgard	2bca05c4f2	ARM64: implement shifts, movz/movn. Corresponding fixes to emitter/disasm	2015-04-06 18:13:14 +02:00
Henrik Rydgard	0922db6062	ARM64: Some FP work.	2015-04-06 18:13:11 +02:00
Henrik Rydgard	d2c746dd64	ARM64: Get the FP reg cache working, implement some basic FP arith	2015-04-06 18:13:11 +02:00
Henrik Rydgard	b309c83973	Initial work on ARM64, based on the ARM jit.	2015-04-06 18:13:01 +02:00