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650687dced330c1d8b2fb282f58debd1d6f8dcde
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1585 Commits
Author SHA1 Message Date
Unknown W. Brackets 757a1a414a arm64: Workaround an apparent gcc bug. 
Only seems to happen with unsigned.  This took a while to track down...
 2015-07-02 19:59:38 -07:00
Unknown W. Brackets e94fd3d4bd arm64: Fix div/divu remainders. 
Erp, I transposed the args when I pasted them.
 2015-06-28 16:52:49 -07:00
Unknown W. Brackets 81b923f1dc arm64: Correct movz/movn. Weren't right after all. 2015-06-28 16:49:28 -07:00
Unknown W. Brackets 4d7a948717 arm64: Fix a dump mistake with rounding modes. 2015-06-28 16:35:46 -07:00
Unknown W. Brackets b6612edf67 arm64: Use a cached rounding func for cvt.w.s. 
This is much faster for this particular instruction, although not all
games even use it.
 2015-06-28 12:40:29 -07:00
Unknown W. Brackets 1c163e4817 arm64: Avoid an ORR for c.ueq. 
This is about 15% faster for this single, uncommon instruction on A57.
 2015-06-28 10:52:17 -07:00
Unknown W. Brackets febe435946 arm64: Use FP load/stores for non-reg pointers. 2015-06-28 10:45:44 -07:00
Unknown W. Brackets 909e4b9bd8 Switch lo and hi so that low comes first. 
This way we can treat it as a single 64-bit value.
 2015-06-28 10:42:19 -07:00
Unknown W. Brackets 213ad4bcc9 arm64: Cleanup branch code a tiny bit. 
Want to make it clear that we can't kill W0 at this point (delay slots.)
 2015-06-28 09:28:54 -07:00
Unknown W. Brackets 0978aa4d5e arm64: Use msub for div/divu remainder. 
Not really much faster, but less instructions at least.
 2015-06-28 09:05:39 -07:00
Unknown W. Brackets 0a5b1c030b arm64: Implement ext and ins. 2015-06-28 08:45:17 -07:00
Unknown W. Brackets daddb73f22 arm64: Implement nor. 2015-06-28 00:41:04 -07:00
Unknown W. Brackets 11a851a139 arm64: Enable movz/movn. 2015-06-28 00:41:04 -07:00
Unknown W. Brackets 223e55a453 arm64: Undisable clz/clo, they work. 
Also, avoid a temp in clo.  It's the tiniest bit faster on A57, though
we'll see how it works out elsewhere.  A bit clearer without the temp
imho.
 2015-06-28 00:41:03 -07:00
Unknown W. Brackets 81bc8107cf arm64: Use UBFX, not LSR, for slti sign check. 
This is about 22% faster on the A57 (for just this one instruction, so not
a huge impact overall.)  Makes sense that it would be since not arith.
 2015-06-28 00:41:03 -07:00
Unknown W. Brackets fedbe645e0 arm64: Use all immediate compares in safemem. 
Ah, this is better.
 2015-06-27 00:22:09 -07:00
Unknown W. Brackets 3c29ec2051 arm64: Optimize codesize in safemem path a bit. 
Will only be used for scratchpad, I think.
 2015-06-27 00:22:04 -07:00
Unknown W. Brackets fbd4db0fc4 arm64: Add a safemem path. 
This is probably not optimal but at least it works.
 2015-06-27 00:22:04 -07:00
Unknown W. Brackets b3aa6d89e9 Fix UBFX encoding (thanks SonicAdvance1.) 2015-06-26 21:27:03 -07:00
Henrik Rydgard e848247f88 ARM64: Also save FP registers around the JIT dispatcher loop 2015-06-14 13:03:46 +02:00
Henrik Rydgard 2c05334d47 ARM64: Fix bug where we didn't save the FP registers correctly in the vertex decoder. 
Also port a few ops from dolphin's ARM64 emitter.
 2015-06-14 12:56:44 +02:00
Jan Beich a4eb49f009 Unbreak build with FakeJit 
Core/MIPS/fake/FakeJit.cpp:141:46: error:
      unknown type name 'FakeJitBlock'; did you mean 'JitBlock'?
const u8 *FakeJit::DoFakeJit(u32 em_address, FakeJitBlock *b)
                                             ^~~~~~~~~~~~
                                             JitBlock
Core/MIPS/JitCommon/JitBlockCache.h:59:8: note:
      'JitBlock' declared here
struct JitBlock {
       ^
Core/MIPS/fake/FakeJit.cpp:141:20: error:
      out-of-line definition of 'DoFakeJit' does not match any declaration in
      'MIPSComp::FakeJit'
const u8 *FakeJit::DoFakeJit(u32 em_address, FakeJitBlock *b)
                   ^~~~~~~~~
Core/HLE/ReplaceTables.cpp:1044:29: error:
      use of undeclared identifier 'JITFUNC'
        { "fabsf", &Replace_fabsf, JITFUNC(Replace_fabsf), REPFLAG_ALLOWINLI...
                                   ^
Core/HLE/ReplaceTables.cpp:1101:27: error:
      invalid application of 'sizeof' to an incomplete type 'const
      ReplacementTableEntry []'
        for (int i = 0; i < (int)ARRAY_SIZE(entries); i++) {
                                 ^~~~~~~~~~~~~~~~~~~
native/math/../base/basictypes.h:67:30: note:
      expanded from macro 'ARRAY_SIZE'
 #define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
                             ^~~
Core/HLE/ReplaceTables.cpp:1117:9: error:
      invalid application of 'sizeof' to an incomplete type 'const
      ReplacementTableEntry []'
        return ARRAY_SIZE(entries);
               ^~~~~~~~~~~~~~~~~~~
native/math/../base/basictypes.h:67:30: note:
      expanded from macro 'ARRAY_SIZE'
 #define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
                             ^~~
Core/MIPS/JitCommon/JitCommon.cpp:31:2: error:
      unknown type name 'Jit'
        Jit *jit;
        ^
Core/MIPS/JitCommon/JitCommon.cpp:100:21: error:
      no member named 'Asm' in 'MIPSComp::FakeJit'
        if (MIPSComp::jit->Asm().IsInSpace((u8 *)(intptr_t)addr)) {
            ~~~~~~~~~~~~~  ^
Core/MIPS/JitCommon/JitCommon.cpp:101:45: error:
      no member named 'Asm' in 'MIPSComp::FakeJit'
                *offset = addr - (uint64_t)MIPSComp::jit->Asm().GetBasePtr();
                                           ~~~~~~~~~~~~~  ^
Core/MemMap.cpp:197:57: error:
      use of undeclared identifier 'MEMVIEW32_MASK'
  ...position, view.size, base + (view.virtual_address & MEMVIEW32_MASK));
                                                             ^
 2015-05-26 15:20:10 +03:00
daniel229 af9e04dc97 Replace framebuffer download in Youkoso Hitsuji-Mura Portable 2015-04-20 16:36:07 +08:00
Unknown W. Brackets b818509734 x86jit: Fix clobbering address in lv.q/sv.q. 
We can't let it go into EAX.  Hmm, maybe there's a cleaner way.
Should fix #7686.
 2015-04-14 23:17:11 -07:00
Unknown W. Brackets 4aa92ed99e Read fcr1-30 as 0. 
Accidentally broken in 91966824bb.
 2015-04-13 19:09:53 -07:00
Henrik Rydgård a1f5c537d4 Merge pull request #7672 from unknownbrackets/jit-minor 
More x86jit micro optimizations for the FPU
 2015-04-13 09:57:02 +02:00
Henrik Rydgård c1b91ff5c1 x86: Add a way to eliminate some mov instructions. 
Not currently used yet.
 2015-04-12 13:50:23 -07:00
Henrik Rydgård 70fa830ba5 Split out the ReplaceJalTo test logic. 
This makes it so the IR, in the future, can work correctly for
replacements.
 2015-04-12 13:35:10 -07:00
Henrik Rydgård c6113b831d Remove unused and duplicate define. 2015-04-12 13:16:01 -07:00
Henrik Rydgård f81781d25c Unify JitOptions in FakeJit also. 2015-04-12 13:15:00 -07:00
Henrik Rydgård a8b50d0c9b Fix MIPSInfo masking for 64-bit flags. 2015-04-12 11:57:49 -07:00
Henrik Rydgård 6dcf56530b Add some missing FPU flags to MIPSTables. 2015-04-12 11:56:04 -07:00
Henrik Rydgård 071b6b986a Best-effort update of the MipsJit prototype 2015-04-12 11:53:16 -07:00
Henrik Rydgård d014d420db Unify JitOptions across the backends. 
This is required to make ExtractIR not a member of the various backends.
 2015-04-12 11:41:26 -07:00
Henrik Rydgård 7bf67509d1 ARM: Cleanup a TODO in NEON VFPU. 2015-04-12 11:21:53 -07:00
Unknown W. Brackets 56f071d26a x86jit: Support SIMD load/store with fastmem off. 
Which is a lot faster, since it usually takes the fast path.
 2015-04-11 01:22:50 -07:00
Henrik Rydgård 81dec36da8 Use an accessor to read the compilerPC. 
In the IR it will be read from the block.
 2015-04-11 01:14:37 -07:00
Henrik Rydgård a897723e6a Separate out jit reading nearby instructions. 
This makes it easier to use an IR for these things, or remove them.
 2015-04-11 00:53:24 -07:00
Henrik Rydgård 59d0baca93 Add way to print some block bloat stats. 2015-04-11 00:12:56 -07:00
Henrik Rydgård 115486e431 Fix some fp instruction in/out flags 2015-04-11 00:03:56 -07:00
Unknown W. Brackets 7ea9bcbc13 x86jit: Avoid mapping rs in vfpu load/store. 
This allows immediate address load/store, when possible, which can be
faster (especially with slow mem enabled.)
 2015-04-10 20:30:14 -07:00
Unknown W. Brackets eaed080add x86jit: Fix immediate kernel addresses. 
Using a signed add + a value with the top bit set = bad.  Will have to
live with losing the kernel bit here, should be fine.
 2015-04-10 20:25:29 -07:00
Unknown W. Brackets e58eb5e186 x86jit: Small optimization for fd->fd fp convert. 
We just generate a little less code.  This is also slightly faster
generally.
 2015-04-10 20:07:43 -07:00
Unknown W. Brackets 7e38df077f x86jit: Prefer MOVAPS over MOVSS for reg->reg. 2015-04-10 20:07:43 -07:00
Unknown W. Brackets 9069c84928 x86jit: Use ANDPS for abs.s. 
Should be faster considering they're likely to use other floating point
math on it.  As long as that's the case, this is faster than PAND.
 2015-04-10 13:20:52 -07:00
Unknown W. Brackets b2b20a6eee Correct an invalid format parameter. 2015-04-08 12:17:24 -07:00
Unknown W. Brackets 8e8a18e9b5 Log read failures from hashmap too. 2015-04-08 12:10:45 -07:00
Unknown W. Brackets 3cb474047b Fix potential shift by negative number. 2015-04-08 11:57:59 -07:00
Unknown W. Brackets fc0788bc95 Avoid unpredictable behavior in error condition. 2015-04-08 11:57:57 -07:00
Unknown W. Brackets b0d291032d armjit Avoid cfc1/mfc1 to $0. 2015-04-07 18:30:36 -07:00