 Henrik Rydgard
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3a11b030d6
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Merge branch 'master' into armjit-fpu
Conflicts:
Core/MIPS/ARM/ArmCompFPU.cpp
Core/MIPS/x86/CompFPU.cpp
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2013-02-10 15:57:16 +01:00 |
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Henrik Rydgard
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f75d14d3b5
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ARM FPU jit work
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2013-02-10 15:53:56 +01:00 |
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Henrik Rydgard
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78923f5538
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Jit a little more (vfpu single load/store, transfer instructions)
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2013-02-10 12:14:55 +01:00 |
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Henrik Rydgard
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377c94b125
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JIT x86: cvt.s.w
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2013-02-06 20:29:49 +01:00 |
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Unknown W. Brackets
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b77ce99d01
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Oops, no slow read for immediates usually.
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2013-01-26 09:27:52 -08:00 |
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Unknown W. Brackets
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9cd5836b85
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Rename WriteFinish() to Finish() is safe mem.
It's nothing to do with writing.
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2013-01-26 09:09:47 -08:00 |
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Unknown W. Brackets
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3e419f513a
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Refactor jit safe memory reads without dup code.
But, maybe too automagical...
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2013-01-26 08:42:34 -08:00 |
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Unknown W. Brackets
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b7ef3e7bef
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Make sure to log / check bad immediate mem access.
Although, theoretically, this should never happen.
Also, definitely time to refactor.
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2013-01-25 23:06:43 -08:00 |
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Unknown W. Brackets
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3418383917
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Immediately break on bad mem access in jit slowmem.
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2013-01-25 22:52:51 -08:00 |
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Henrik Rydgard
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68991511ee
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Split out the FPU reg cache into its own file too.
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2013-01-26 01:34:19 +01:00 |
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Unknown W. Brackets
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a43078ab68
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Same optimization for FPU load / store.
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2013-01-20 13:16:41 -08:00 |
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Unknown W. Brackets
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da22eb8adf
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Make swc1 and lwc1 fast even without fastmem.
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2013-01-20 02:07:00 -08:00 |
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Henrik Rydgard
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f5efd6f2b1
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JIT: add option to enable/disable jit of memory instructions. for crash safety.
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2012-12-21 16:50:13 +01:00 |
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Henrik Rydgard
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d485b76e11
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Jit fixes, test update
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2012-11-12 14:35:10 +01:00 |
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Henrik Rydgard
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64cc573703
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Switch to "GPL 2.0 or later" for various reasons. I wrote most of the code I imported from Dolphin (which is GPL2-but-not-later), so it should be OK.
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2012-11-04 23:24:00 +01:00 |
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Henrik Rydgard
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4f7ad15758
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Add snapshot of the whole source code.
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2012-11-01 16:19:01 +01:00 |
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