Sacha
dea2ae0950
SDL: Support low resolution displays by automatically using fullscreen when window is too large.
2014-11-14 01:38:50 +10:00
Henrik Rydgård
653ac91d6a
Merge pull request #7089 from sum2012/MAC
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Fix Wrong MAC address by "Change MAC address"
2014-11-13 16:05:55 +01:00
sum2012
486c32b91b
Fix 0A to 0F
2014-11-13 22:57:57 +08:00
sum2012
05b293c632
No need bracket
2014-11-13 22:20:29 +08:00
sum2012
122c3b866e
Fix Wrong MAC address by "Change MAC address"
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Part 1 of 7088
2014-11-13 22:13:57 +08:00
Sacha
92b0f3b7d9
Minor change. Fix build.
2014-11-13 23:45:45 +10:00
xSacha
c228b9a61e
Update for CMake.
2014-11-13 23:23:53 +10:00
xSacha
57e4088216
Introduce fake vertex decoder JIT as well.
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Compiles and links on CI20 but gets unknown crash in GL driver.
2014-11-13 17:10:29 +10:00
Sacha
c421617c84
Fix Qt build by building Arm disassembler for all platforms.
2014-11-13 00:55:00 +10:00
Sacha
a0086f6412
Introduce a Fake JIT for generic builds.
2014-11-13 00:09:51 +10:00
Henrik Rydgård
cbef4fae26
Merge pull request #7083 from Kingcom/Disasm
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Change vpfxs/r/t disassembly syntax
2014-11-12 00:39:03 +01:00
Henrik Rydgard
9e0aa8eaa3
Drop silly way of doing CPUID on Android, the right way seems to work
2014-11-12 00:29:16 +01:00
Kingcom
479c8646a2
Change vpfxs/r/t disassembly syntax
2014-11-12 00:09:57 +01:00
Henrik Rydgard
784bf82b58
Improve AVX check in CPUDetect. Warning fix.
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Keeping the ifdef for zenfone - still doesn't work without it
2014-11-11 23:48:58 +01:00
Henrik Rydgard
7409263eb0
Make CPUDetect.cpp not blow up on Zenfone devices.
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Don't really know what's going on here, but this seems like the easiest way out. Appears that CPUID really is buggy on this hardware, which seems weird. Alternate explanations would be that we are checking the wrong bits for xgetbv support or something...
2014-11-11 23:08:28 +01:00
Sacha
ee0c593258
Fix Android.
2014-11-12 03:19:46 +10:00
Unknown W. Brackets
c02172ebd5
vertexjit: Oops, this wasn't supposed to be there.
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Fixes #7081 .
2014-11-11 08:31:27 -08:00
Henrik Rydgård
a8b310ed34
Merge pull request #7078 from unknownbrackets/jit-minor
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x86jit: Use simd for vcmp comparisons where possible
2014-11-11 14:58:21 +01:00
Henrik Rydgård
eb4ce44f19
Merge pull request #7079 from xsacha/new_archs
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Better support for new archs.
2014-11-11 14:58:08 +01:00
Sacha
1ba9103cef
Better support for new archs.
2014-11-11 22:55:49 +10:00
Unknown W. Brackets
096b41cceb
x86jit: Interleave reg usage in vcmp.
2014-11-10 23:22:04 -08:00
Unknown W. Brackets
0e1aa35e84
x86jit: Just do the ES/NS compare once.
2014-11-10 23:04:38 -08:00
Unknown W. Brackets
2758e8fa3c
x86jit: Optimize vcmp for single and simd.
2014-11-10 23:04:37 -08:00
Unknown W. Brackets
0f1bd91408
Merge pull request #7077 from Bigpet/qtScrSave
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add success flag for qt screenshot too
2014-11-10 09:14:45 -08:00
Unknown W. Brackets
94e29da6c4
Fix a typo in the mips assembler.
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Oops, this should be a unique value of course.
2014-11-10 09:13:11 -08:00
Peter Tissen
6f062b9b16
add success flag for qt screenshot too
2014-11-10 16:57:51 +01:00
Unknown W. Brackets
01c2b88911
Avoid signed ints, seems to cause clang errors.
2014-11-09 16:49:24 -08:00
Henrik Rydgård
7fbe8ba898
Merge pull request #7076 from unknownbrackets/debugger
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Add VFPU instructions to the mips asm tables
2014-11-10 00:57:08 +01:00
Henrik Rydgård
d2214ba701
Merge pull request #7075 from unknownbrackets/jit-minor
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x86jit: A few more minor optimizations, zero bugfix
2014-11-10 00:50:37 +01:00
Unknown W. Brackets
370fb86379
Add VFPU instructions to the mips asm tables.
2014-11-09 15:14:07 -08:00
Unknown W. Brackets
86e3739a3e
x86jit: Optimize some cases of ins/ext.
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They happen but are minor.
2014-11-09 09:22:29 -08:00
Unknown W. Brackets
e05263af32
x86jit: Allow EBX sign extension for 32-bit.
2014-11-09 09:07:52 -08:00
Unknown W. Brackets
8dbd3c3b9c
x86jit: Don't lie about ZERO when it's not an imm.
2014-11-09 08:27:02 -08:00
Unknown W. Brackets
d0a2ced2f9
x86jit: Flip cc in stl* to avoid reg loads.
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Unfortunately, this zero thing is now concerning me...
2014-11-09 08:15:39 -08:00
Unknown W. Brackets
59f491eddb
x86jit: Micro optimize slt* a bit.
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This improves their performance and hopefully latency. It also avoids
filling registers that are not likely to be used again.
Fixed a small mistake.
2014-11-09 07:23:44 -08:00
Henrik Rydgard
18495a452d
Rename an enum
2014-11-09 14:55:23 +01:00
Henrik Rydgard
a19d0b648a
x86 jit: Add a simple speedhack (ignore masking stack pointers) but disable due to low impact.
2014-11-09 14:54:39 +01:00
level99procrastinator
52d6f40ec8
Make sure no NaN goes into projection matrix.
2014-11-09 20:34:23 +08:00
Henrik Rydgard
a528921f3c
x86 JIT: EBX was free in 32-bit mode, let's use it in the regcache.
2014-11-09 12:55:17 +01:00
Henrik Rydgard
1eec10b614
Properly prevent loading ISO to RAM in 32-bit mode (could have been enabled in 64-bit mode where the UI exists)
2014-11-09 12:53:31 +01:00
Henrik Rydgard
db853d8513
Collapse sequences of "int3" (padding after block linking) in x86 disassembly.
2014-11-09 12:10:37 +01:00
Henrik Rydgard
5888b3bdc4
Revert "x86jit: Micro optimize slt* a bit."
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This reverts commit ee66596b8d
2014-11-09 12:07:21 +01:00
Henrik Rydgard
5bcdecc26b
unittest: Have the JIT harness print disassembly, to make it easy to inspect results.
2014-11-09 12:03:04 +01:00
Henrik Rydgård
450227b2c6
Merge pull request #7074 from unknownbrackets/jit-minor
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x86jit: More fpu optimizations
2014-11-09 10:16:14 +01:00
Unknown W. Brackets
313d9e95c7
Clarify a comment.
2014-11-09 01:05:03 -08:00
Unknown W. Brackets
ee66596b8d
x86jit: Micro optimize slt* a bit.
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This improves their performance and hopefully latency. It also avoids
filling registers that are not likely to be used again.
2014-11-08 22:54:03 -08:00
Unknown W. Brackets
27d8108bb2
x86jit: Optimize loads of 0 into fp regs.
2014-11-08 18:41:16 -08:00
Unknown W. Brackets
7d8858687e
x86jit: Avoid speculative loads in mtc1/mfc1.
2014-11-08 18:35:15 -08:00
Unknown W. Brackets
57caa95273
x86jit: Implement round.w.s and friends.
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They are not terribly fast, though, updating MXCSR.
2014-11-08 17:59:38 -08:00
Unknown W. Brackets
3908e0f445
x86jit: Small optimization for add.s f1, f2, f2.
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Doubles the speed of that particular case. Biggest difference is not
loading fd for no reason.
2014-11-08 17:32:53 -08:00
Sacha