 Henrik Rydgård
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115486e431
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Fix some fp instruction in/out flags
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2015-04-11 00:03:56 -07:00 |
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Unknown W. Brackets
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7ea9bcbc13
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x86jit: Avoid mapping rs in vfpu load/store.
This allows immediate address load/store, when possible, which can be
faster (especially with slow mem enabled.)
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2015-04-10 20:30:14 -07:00 |
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Unknown W. Brackets
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eaed080add
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x86jit: Fix immediate kernel addresses.
Using a signed add + a value with the top bit set = bad. Will have to
live with losing the kernel bit here, should be fine.
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2015-04-10 20:25:29 -07:00 |
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Unknown W. Brackets
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e58eb5e186
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x86jit: Small optimization for fd->fd fp convert.
We just generate a little less code. This is also slightly faster
generally.
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2015-04-10 20:07:43 -07:00 |
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Unknown W. Brackets
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7e38df077f
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x86jit: Prefer MOVAPS over MOVSS for reg->reg.
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2015-04-10 20:07:43 -07:00 |
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Unknown W. Brackets
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9069c84928
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x86jit: Use ANDPS for abs.s.
Should be faster considering they're likely to use other floating point
math on it. As long as that's the case, this is faster than PAND.
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2015-04-10 13:20:52 -07:00 |
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Unknown W. Brackets
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c10373ef06
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ARM64: Fix some minor MSVC warnings.
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2015-04-10 12:05:51 -07:00 |
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Henrik Rydgard
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6660985210
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Extract a bunch more color conversion loops.
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2015-04-08 22:52:48 +02:00 |
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Henrik Rydgard
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31961eace9
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Color conv attempt 2. Start consolidating simple color conversion functions in a single header+cpp.
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2015-04-08 22:52:46 +02:00 |
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Henrik Rydgard
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fdf5c36865
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Fix line endings of a few project files to be consistent. Hopefully will avoid the annoying merge issues in the future.
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2015-04-08 22:52:45 +02:00 |
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Unknown W. Brackets
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9dc7f7c3a2
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Correct > 8 args for HLE logging again.
This time for real? Arg, stupid mistake.
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2015-04-08 12:44:32 -07:00 |
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Henrik Rydgård
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050a7c1a85
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Merge pull request #7667 from unknownbrackets/warnings
Fix some warnings
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2015-04-08 21:21:08 +02:00 |
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Unknown W. Brackets
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b2b20a6eee
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Correct an invalid format parameter.
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2015-04-08 12:17:24 -07:00 |
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Unknown W. Brackets
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0847d46b79
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Remove always-true condition.
It was only for logging anyway, can't be that important.
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2015-04-08 12:15:41 -07:00 |
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Unknown W. Brackets
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8e8a18e9b5
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Log read failures from hashmap too.
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2015-04-08 12:10:45 -07:00 |
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Unknown W. Brackets
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afe42fa505
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Log an error if ftruncate() fails.
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2015-04-08 12:08:46 -07:00 |
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Henrik Rydgard
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56a596d099
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Fix line endings in some vcproj.filters files. Should prevent future annoying conflicts, althoug this one is ugly.
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2015-04-08 20:58:04 +02:00 |
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Unknown W. Brackets
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3cb474047b
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Fix potential shift by negative number.
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2015-04-08 11:57:59 -07:00 |
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Unknown W. Brackets
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c0dde25e5a
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Set the sid on StreamInfo.
It's not used anyway, but if we have it there it might be later.
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2015-04-08 11:57:58 -07:00 |
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Unknown W. Brackets
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fc0788bc95
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Avoid unpredictable behavior in error condition.
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2015-04-08 11:57:57 -07:00 |
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Unknown W. Brackets
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53340056fd
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Remove some unreachable code.
This wasn't being used, and the other path should be fine.
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2015-04-08 11:28:52 -07:00 |
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Unknown W. Brackets
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b5bb07b12c
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Fix HLE logging for args > 8.
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2015-04-08 00:55:49 -07:00 |
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Henrik Rydgård
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4ba1113119
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Merge pull request #7665 from unknownbrackets/jit-minor
Avoid some unlikely writes to $0
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2015-04-08 09:33:15 +02:00 |
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Unknown W. Brackets
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ffb583e298
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ARM64: Move files into MSVC project filter.
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2015-04-07 22:27:20 -07:00 |
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Unknown W. Brackets
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b0d291032d
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armjit Avoid cfc1/mfc1 to $0.
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2015-04-07 18:30:36 -07:00 |
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Unknown W. Brackets
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7ce5841f30
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jit: Avoid mfhi/mflo to $0.
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2015-04-07 18:25:28 -07:00 |
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Unknown W. Brackets
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788b9d78f8
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jit: Avoid a super unlikely write to zero.
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2015-04-07 18:20:37 -07:00 |
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Henrik Rydgård
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bc490e60ab
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Merge pull request #7661 from lioncash/false
sceIo: Remove always false condition
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2015-04-06 23:29:52 +02:00 |
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Henrik Rydgård
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39be916d8a
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ARM64: More emitter/disasm
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2015-04-06 18:13:44 +02:00 |
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Henrik Rydgård
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459ba28655
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ARM64: SW skinning runs without crashing but is broken.
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2015-04-06 18:13:44 +02:00 |
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Henrik Rydgård
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f82b613371
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ARM64 emitter/disasm: Implement ASIMD LDP/STP instructions
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2015-04-06 18:13:42 +02:00 |
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Henrik Rydgård
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a8c2d0945a
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ARM64: lwl: Pass INVALID_REG to be sure SCRATCH1 doesn't get overwritten...
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2015-04-06 18:13:41 +02:00 |
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Henrik Rydgård
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013bbc71af
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ARM64: Fix DUP disasm, INS disasm
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2015-04-06 18:13:40 +02:00 |
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Henrik Rydgård
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a3db3ed5c1
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ARM64 emitter: Fix UXTL/SXTL and friends. Add disasm.
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2015-04-06 18:13:40 +02:00 |
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Henrik Rydgård
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853d6ea34b
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ARM64 emitter: Add FMLA/FMLS vector versions
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2015-04-06 18:13:39 +02:00 |
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Henrik Rydgård
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065cd97dc2
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ARM64: LLVM buildfix, some more disasm
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2015-04-06 18:13:39 +02:00 |
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Henrik Rydgård
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13c9390c53
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ARM64: Emitter fix, disable swl/swr/lwl/lwr again fully
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2015-04-06 18:13:38 +02:00 |
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Henrik Rydgård
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95cd1478de
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Restore the x86 build.
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2015-04-06 18:13:37 +02:00 |
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Henrik Rydgård
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fbaffdceab
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Remove some outdated comments, minor stuff
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2015-04-06 18:13:36 +02:00 |
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Henrik Rydgard
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0a70618f87
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ARM64: Accurate floating point rounding. For some reason, FTZ doesn't seem to work though.
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2015-04-06 18:13:36 +02:00 |
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Henrik Rydgard
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7d918c0ad8
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ARM64: Just some disasm improvements
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2015-04-06 18:13:35 +02:00 |
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Henrik Rydgard
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ad3d539451
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ARM64: Attempt at lwl/lwr/swl/swr. The first two don't work
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2015-04-06 18:13:35 +02:00 |
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Henrik Rydgard
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44286a2b37
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ARM64: Accurate float->int conversion with rounding mode.
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2015-04-06 18:13:34 +02:00 |
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Henrik Rydgard
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4618275f99
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ARM64: Add a few aliases to emitter. Disasm fixes.
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2015-04-06 18:13:33 +02:00 |
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Henrik Rydgard
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acf08eefa8
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ARM64: Fix FCVTL, use it in v2hf
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2015-04-06 18:13:33 +02:00 |
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Henrik Rydgard
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8eedcc7fb0
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ARM64: Speedup fpu/vfpu load/stores too using "pointerification". Actually noticeable gain.
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2015-04-06 18:13:32 +02:00 |
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Henrik Rydgard
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ad648baa9c
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ARM64 regcache: Add support to "pointerify" registers. Use in load/store to cut down instructions.
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2015-04-06 18:13:32 +02:00 |
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Henrik Rydgard
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0849e270ee
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ARM64: fmla encoding, more disasm
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2015-04-06 18:13:31 +02:00 |
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Henrik Rydgard
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2780eef595
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ARM64: Another couple of VFPU ops
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2015-04-06 18:13:31 +02:00 |
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Henrik Rydgard
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ca58f322e5
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ARM64: Port over some missing VFPU instructions from ARM. Not much left now.
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2015-04-06 18:13:30 +02:00 |
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