Henrik Rydgård and Claude Opus 5
3fa67f22ed
Interpreter: honor the guest's FPU rounding mode and flush-to-zero
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Every JIT backend puts the host FPU into the mode fcr31 asks for (bits 0-1 and
24) before running emulated code, and takes it back out before calling any host
code. The plain interpreter did none of that, so all its float math rounded to
nearest with denormals intact no matter what the game had set - cpu/fpu/fpu
fails under -i and passes under the JIT on exactly this.
Move the helpers the IR interpreter already had for this out of IRInterpreter
and into MIPS.cpp as ApplyHostRoundingMode/RestoreHostRoundingMode, and use them
around the interpreter's run loop and single step, restoring around syscalls and
replacement functions, which are host code. ctc1 re-applies immediately, since
the interpreter has no block boundary to defer it to.
round.w.s changes with it: it was floorf(x + 0.5f), which is half-away-from-zero
rather than the half-to-even every JIT produces, and the add would now pick up
the guest's rounding mode on top of that. round_ieee_754 is both correct and
mode-independent, and is what cvt.w.s already used for the same rounding.
Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com >
Claude-Session: https://claude.ai/code/session_01SfY7iFJEjmRXf1XGrTs4MF
2026-08-27 16:43:06 +02:00
Henrik Rydgård
67ddf899ba
Plumb through the PC value for syscalls, so we can get better diagnostics for unresolved ones.
2026-08-15 19:14:13 +02:00
Henrik Rydgård
e9a3449ede
More MIPSState * plumbing (manual)
2026-08-12 14:02:19 +02:00
Henrik Rydgård
cc90546301
Prep for plumbing the MIPS context pointer into the interpreter.
2026-08-12 11:25:06 +02:00
Henrik Rydgård
55a255b042
Fix the ARM version of Vec4Pack32To8.
2026-03-26 10:49:32 -06:00
Henrik Rydgård
5a5630d130
More NEON/SSE in IRInterpreter
2026-03-26 10:49:32 -06:00
Henrik Rydgård
78739104b1
Additional micro-optimizations (verified) in the IRInterpreter
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Turns out that u8 promotes to int, causing signed indexing arithmetic
which is completely unnecessary.
2026-03-26 10:49:32 -06:00
Henrik Rydgård
b233745640
Add NEON versions of a few more IRInterpreter instructions
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Buildfix
2026-03-26 10:49:32 -06:00
Henrik Rydgård
936c344a52
misc
2026-02-09 16:41:51 +01:00
Henrik Rydgård
20e3a0cc70
Use temporaries to improve codegen in more IR vector ops
2025-10-17 09:26:15 +02:00
Henrik Rydgård
d23a224e7a
Use temporaries to try to improve codegen for IROp::Vec4Blend
2025-10-17 09:26:15 +02:00
Henrik Rydgård
c3dfddebd7
IR interpreter: Improve code gen for the main interpreter loop
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Thanks to fp64 for the idea of using unreachable markers to avoid the
range check on the switch!
Additionally, use it in a few more places.
2025-10-15 21:15:30 +02:00
Henrik Rydgård
a72fc6f79c
Support showing (and sorting by) IR profiler info in the JIT viewer
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This will help future work on #19143 .
2025-10-09 17:02:52 -06:00
Henrik Rydgård
db0cc01a81
IR interpreter on ARM64: Cleanup FPCR set/get, support floating point control on Windows
2025-10-09 11:14:47 -06:00
Henrik Rydgård
e93c80db4e
Cleaning up our SIMD header includes, using the new header
2024-12-19 16:08:48 +01:00
Henrik Rydgård
96c4a10e8c
Add two new core states, rename RUNNING to RUNNING_CPU and similar for stepping.
2024-12-01 21:04:21 +01:00
Henrik Rydgård
7992ff4627
Make CBreakpoints an object
2024-11-25 00:22:53 +01:00
Henrik Rydgård
d3e9398cb3
Split Core_EnableStepping into Core_Break and Core_Resume
2024-11-03 17:53:42 +01:00
Nemoumbra
ff5877e993
Renamed the IR instruction, new UI button added
2024-09-14 19:46:05 +03:00
Nemoumbra
25f6b01d86
Added the initialization code + UI bindings + logs
2024-09-14 19:46:05 +03:00
Nemoumbra
e3b09bea59
Ported the MIPSLogger's UI + basic integration of MIPSTracer
2024-09-14 19:46:05 +03:00
Nemoumbra
a6be0517dc
New IR instruction added
2024-09-14 19:46:04 +03:00
Henrik Rydgård
9fb97add3f
Bugfixes
2024-07-26 14:22:31 +02:00
Henrik Rydgård
d3e6f19b6d
Comments, log, cleanup
2024-07-22 01:15:35 +02:00
Henrik Rydgård
982a83d867
IRInterpreter: Optimize variable shifts (no need to mask by 0x1f)
2024-06-24 09:30:21 +02:00
Henrik Rydgård
06315ae6ee
IRInterpreter: Slight optimization for fmul
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Just put stuff in temporaries, allows for better codegen
2024-06-24 09:12:57 +02:00
Henrik Rydgård
06e636bfdc
Build and comment fixes
2024-06-19 20:24:59 +02:00
Henrik Rydgård
e64d768113
Implement the same for ARM64
2024-06-19 20:00:36 +02:00
Henrik Rydgård
0080f71ca4
Implement FPU rounding mode support in the IR interpreter for x86/x64
2024-06-19 18:09:38 +02:00
Henrik Rydgård
c9ca3904d3
Combine move-from-gpr and float cast.
2024-06-08 22:59:48 +02:00
Henrik Rydgård
0c246297d2
Create an IR op for a FPRtoGPR + shift-right-8, very common
2024-06-07 21:26:20 +02:00
Henrik Rydgård
da88011805
Specialize a few arithmetic instructions for the interpreter.
2024-06-07 19:32:37 +02:00
Henrik Rydgård
becc145099
Improve code generation for some IRInterpreter ops
2024-06-02 10:25:04 +02:00
Henrik Rydgård
d4e3597ddb
Minor codegen improvement
2024-06-02 10:23:44 +02:00
Henrik Rydgård
3b5c71170c
IRInterpreter: Various SIMD optimization. Move out the reverse-bits implementation
2024-06-01 20:29:03 +02:00
Henrik Rydgård
49b0af20ca
IRInterpreter: Reorder some ops towards the end, trying to keep "hot" ops together
2024-06-01 18:06:31 +02:00
Henrik Rydgård
fae846e52a
Remove the count parameter from IRInterpret. This is a good speed boost!
2024-05-10 23:31:24 +02:00
Henrik Rydgård
092179c42d
More IR interpreter tweaks
2024-05-10 18:41:55 +02:00
Henrik Rydgård
91d9ef9b81
Minor IR interpreter optimization
2024-05-10 18:27:29 +02:00
Henrik Rydgård
e5af1f8bd0
Merge pull request #18560 from unknownbrackets/replacement-slice
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HLE: Slice the very slow memset/memcpy variants
2023-12-17 12:35:48 +01:00
Unknown W. Brackets
053831bf4d
HLE: Add mechanics for sliced replacements.
2023-12-16 09:08:58 -08:00
Henrik Rydgård
45aae7b9da
ARM32: Backport a lot of previously 64-bit-only NEON optimizations to ARM32.
2023-11-27 23:51:10 +01:00
Unknown W. Brackets
259734bd47
irjit: Fix likely delay slot breakpoints.
2023-09-03 12:27:10 -07:00
Unknown W. Brackets
e1a1f56f4c
irjit: Cleanup breakpoint ops.
2023-09-03 12:27:10 -07:00
Unknown W. Brackets
c85886c11e
irjit: Use enum for rounding modes.
2023-09-01 22:29:24 -07:00
Unknown W. Brackets
269a57a8b8
irjit: Fix vmin/vmax NAN handling.
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Oops, this needs to be signed.
2023-08-23 06:50:42 -07:00
Unknown W. Brackets
2b36e0a625
irjit: ZeroFpCond -> FpCondFromReg.
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We already have a zero reg, so this is more useful and symmetrical.
2023-08-13 10:40:47 -07:00
Unknown W. Brackets
e73c203984
irjit: Fix Vec4Shuffle overlap issue.
2023-08-08 23:00:39 -07:00
Unknown W. Brackets
79ca880ac7
irjit: Implement vqmul, add Vec4Blend.
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Should be useful more places.
2023-08-06 13:38:00 -07:00
Henrik Rydgård
c8447ff4b7
Merge pull request #17801 from unknownbrackets/irjit-vminmax
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irjit: Fix vmin/vmax nan handling
2023-07-30 09:18:25 +02:00
