14866 Commits
Author SHA1 Message Date
Henrik Rydgård 6c3547d7ae Merge pull request #18073 from unknownbrackets/arm64jit-vec4
arm64jit: Implement several other Vec4 IR ops
2023-09-06 08:55:57 +02:00
Henrik Rydgård 95e86c73b8 SasAudio: Some cleanup and debug overlay improvements
Shows "BAD" in the overlay if address out of range.

Which does happen in Afterburner, see issue #14010.
2023-09-05 12:15:13 +02:00
Unknown W. Brackets 953d97b54a arm64jit: Implement Vec4Init. 2023-09-05 00:10:26 -07:00
Unknown W. Brackets 11f92b4684 arm64jit: Implement Vec4Dot. 2023-09-05 00:10:26 -07:00
Unknown W. Brackets 81aeb04788 arm64jit: Implement Vec4Blend. 2023-09-05 00:10:26 -07:00
Unknown W. Brackets 85387b44a1 arm64jit: Implement Vec4Scale. 2023-09-05 00:10:26 -07:00
Unknown W. Brackets 3f29b4c713 Merge pull request #18068 from unknownbrackets/arm64jit-shuffle
arm64jit: Implement shuffle optimizer
2023-09-05 00:10:08 -07:00
Henrik Rydgård 37fc621d8a Merge pull request #18071 from unknownbrackets/arm64jit-muldiv
arm64jit: Implement IR multiplies and divides
2023-09-05 09:07:02 +02:00
Unknown W. Brackets d8231ecb17 arm64jit: Implement divide in IR. 2023-09-04 23:38:55 -07:00
Unknown W. Brackets c272284043 arm64jit: Implement multiplies in IR. 2023-09-04 23:38:55 -07:00
Unknown W. Brackets 17ffc9c261 arm64jit: Special case some shuffles.
To avoid 4 instruction shuffles.
2023-09-04 23:37:40 -07:00
Henrik Rydgård 67cb466ee1 Allow using a file browser to choose UMDs during disc change. 2023-09-04 21:43:10 +02:00
Unknown W. Brackets 885ae5c805 arm64jit: Implement shuffle optimizer. 2023-09-04 12:27:39 -07:00
Henrik Rydgård 9690a71a14 Merge pull request #18061 from unknownbrackets/arm64-ir-jit
arm64jit: Implement most ALU and load/store in IR jit
2023-09-04 10:02:24 +02:00
Unknown W. Brackets 494aab62fc Merge pull request #18063 from unknownbrackets/arm64-ir-float
arm64jit: Add some initial float and vec4 ops
2023-09-04 00:08:08 -07:00
Unknown W. Brackets 5134b7eedb Merge pull request #18064 from unknownbrackets/arm64-ir-exit
arm64jit: Implement exits and a few system ops
2023-09-04 00:07:13 -07:00
Unknown W. Brackets 85b80bc9e5 arm64jit: Implement load/store in IR. 2023-09-04 00:04:36 -07:00
Unknown W. Brackets ccee8e41ee arm64jit: Implement exits. 2023-09-03 21:16:08 -07:00
Unknown W. Brackets e02426cbbf arm64jit: Implement some system ops. 2023-09-03 21:16:08 -07:00
Unknown W. Brackets 0933381b9e arm64jit: Add some simple vec4 ops. 2023-09-03 21:14:58 -07:00
Unknown W. Brackets 87b9633258 arm64jit: Add some simple float ops. 2023-09-03 21:14:58 -07:00
Unknown W. Brackets 1042737c21 irjit: Correct metadata on Vec2 packing ops. 2023-09-03 21:13:11 -07:00
Unknown W. Brackets c44f0e1fca arm64jit: Implement most ALU in IR jit. 2023-09-03 15:30:55 -07:00
Henrik Rydgård 2f300c2023 Merge pull request #18060 from unknownbrackets/x86-jitbase
x86jit: Bake emuhack mask into jitbase
2023-09-03 22:53:23 +02:00
Henrik Rydgård daa0586641 Merge pull request #18059 from unknownbrackets/arm64-ir-jit
arm64jit: Add initial base for IR jit
2023-09-03 22:33:24 +02:00
Unknown W. Brackets 9439a43323 riscv: Correct an overlap case, fix assert. 2023-09-03 13:29:57 -07:00
Unknown W. Brackets 0452b8b57a riscv: Account for emuhack in JITBASEREG. 2023-09-03 13:29:05 -07:00
Unknown W. Brackets 1d152a1486 x86jit: Bake emuhack mask into jitbase. 2023-09-03 12:49:36 -07:00
Henrik Rydgård 4694a11b9f Merge pull request #18053 from unknownbrackets/x86-jit-debug
x86jit: Handle breakpoints
2023-09-03 21:45:48 +02:00
Unknown W. Brackets 60bcc5b083 x86jit: Handle breakpoints.
Otherwise, we don't actually break until later, which isn't great.
Could be more optimal, "rewinding" regcache state.
2023-09-03 12:28:11 -07:00
Unknown W. Brackets 259734bd47 irjit: Fix likely delay slot breakpoints. 2023-09-03 12:27:10 -07:00
Unknown W. Brackets e1a1f56f4c irjit: Cleanup breakpoint ops. 2023-09-03 12:27:10 -07:00
Unknown W. Brackets 7607280837 arm64jit: Implement just the most basic ops.
This improves the slowness a good bit.
2023-09-03 12:20:16 -07:00
Unknown W. Brackets 1b756ff8c1 arm64jit: Add initial base for IR jit.
This works, but very slowly at this point.
2023-09-03 12:14:28 -07:00
Henrik Rydgård 8a5e4d3591 Merge pull request #18054 from unknownbrackets/memblockinfo
HLE: Capture better allocation names
2023-09-03 10:38:03 +02:00
Unknown W. Brackets c7304eccdb x86jit: Avoid R15 for jitbase if near ctxreg. 2023-09-02 23:05:56 -07:00
Unknown W. Brackets 32feb82d16 HLE: Capture better allocation names.
We know which FPL, so don't just say "FPL".
2023-09-02 22:55:45 -07:00
Henrik Rydgård f6c1493373 Merge pull request #18048 from unknownbrackets/irjit-vec4
IR: Add a pass to keep things in vec4 more
2023-09-02 15:11:06 +02:00
Henrik Rydgård 20dedec07e Merge pull request #18046 from unknownbrackets/x86-jit-reduce
x86jit: Reduce bloat further
2023-09-02 13:37:20 +02:00
Unknown W. Brackets 739e474957 irjit: Improve dot and store vec4 interaction. 2023-09-01 22:35:59 -07:00
Unknown W. Brackets becad54923 x86jit: Maintain Vec4 on FMov extract. 2023-09-01 22:35:59 -07:00
Unknown W. Brackets 2ca638868c irjit: Remove Vec4Scale/Vec4Dot aliasing in pass. 2023-09-01 22:35:59 -07:00
Unknown W. Brackets 96c90c19c6 irjit: Reduce unnecessary shuffles.
If it's never used as a Vec4 again, it's often not worth it.
2023-09-01 22:35:59 -07:00
Unknown W. Brackets 5f84887dea irjit: Add a pass to keep Vec4s in Vec4s. 2023-09-01 22:35:59 -07:00
Unknown W. Brackets 9bac755491 x86jit: Avoid pointerify if clobbered.
For x86, it's not worth it for one.
2023-09-01 22:34:22 -07:00
Unknown W. Brackets b370a89ef2 x86jit: Reduce block link padding.
Reduces bloat a good bit.
2023-09-01 22:33:02 -07:00
Unknown W. Brackets c5d0e1d0cc x86jit: Implement float to integer. 2023-09-01 22:31:25 -07:00
Unknown W. Brackets c85886c11e irjit: Use enum for rounding modes. 2023-09-01 22:29:24 -07:00
iota97 01083c87ea Analog stick gesture 2023-09-01 09:32:21 +02:00
Henrik Rydgård ce47055860 Touch controls: Add an option for "Sticky D-Pad".
Will make it a lot easier to pull off certain moves in fighting games.

Should help #17950
2023-08-31 22:37:11 +02:00