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14759 Commits
Author SHA1 Message Date
Henrik Rydgard 9e2786b319 ARM64: Fix and enable a bunch more instructions. temporarily disable movz movn 2015-04-06 18:13:15 +02:00
Henrik Rydgard 2bca05c4f2 ARM64: implement shifts, movz/movn. Corresponding fixes to emitter/disasm 2015-04-06 18:13:14 +02:00
Henrik Rydgard 86ff2a2806 ARM64: Enable a bunch of arithmetic instructions that now work, thanks to emitter fixes 2015-04-06 18:13:13 +02:00
Henrik Rydgard 77501e220d ARM64: Enable a few more instructions, more emitter/disasm unittests 2015-04-06 18:13:13 +02:00
Henrik Rydgard 70f44c3894 ARM64 emitter: Default to non-extend instruction forms (LSL 0), fix bugs. also fixes to disasm. 2015-04-06 18:13:12 +02:00
Henrik Rydgard d3669daba4 ARM64: Fixes to emitter and disassembly for logical immediates 2015-04-06 18:13:12 +02:00
Henrik Rydgard 0922db6062 ARM64: Some FP work. 2015-04-06 18:13:11 +02:00
Henrik Rydgard d2c746dd64 ARM64: Get the FP reg cache working, implement some basic FP arith 2015-04-06 18:13:11 +02:00
Henrik Rydgard d16bd1fd30 ARM64: Port over basic load/store from ARM. Works in FastMem only. 2015-04-06 18:13:10 +02:00
Henrik Rydgard 8dc77ff32e ARM64: Turn off some debugging stuff, start implementing instructions. Something is wrong though, if I implement more than addiu things break.. 2015-04-06 18:13:09 +02:00
Henrik Rydgard 742f48ad56 ARM64: More emitter and disasm work 2015-04-06 18:13:08 +02:00
Henrik Rydgard c4cdca83fc ARM64: Fix some branch distance checks, add more stuff to disasm 2015-04-06 18:13:08 +02:00
Henrik Rydgard cc722f09f6 Improve ARM64 disassembly by merging MOVZ+MOVK. Minor stuff. 2015-04-06 18:13:07 +02:00
Henrik Rydgard 73dd26fb75 More ARM64 disasm, warning fixes 2015-04-06 18:13:07 +02:00
Henrik Rydgard 58b059ca14 Some casting cleanup, misc 2015-04-06 18:13:06 +02:00
Henrik Rydgard 34ab532971 ARM64 jit: Fix some pointer truncations and other fun stuff.. 2015-04-06 18:13:05 +02:00
Henrik Rydgard e7e58591da More JIT work, not quite there yet... 2015-04-06 18:13:04 +02:00
Henrik Rydgard f732fbb885 ARM64 emitter: Add MRS/MSR support (only for the flags register). Add some more to ARM64 Disasm 2015-04-06 18:13:04 +02:00
Henrik Rydgard 524583d53e ARM64 emitter work, dispatcher work, etc. More work needed. 2015-04-06 18:13:03 +02:00
Henrik Rydgard 8945b2476d Add the beginnings of a rudimentary ARM64 disassembler 2015-04-06 18:13:03 +02:00
Henrik Rydgard b309c83973 Initial work on ARM64, based on the ARM jit. 2015-04-06 18:13:01 +02:00
Henrik Rydgård a269e118b3 Merge pull request #7658 from unknownbrackets/debugger 
Make it easier to use memchecks in HLE
 2015-04-06 17:03:14 +02:00
Lioncash 1ac81b5014 sceIo: Remove always false condition 2015-04-06 10:05:44 -04:00
Unknown W. Brackets 2209cf22de Do the memcheck after the memory access in HLE. 2015-04-06 00:37:33 -07:00
Unknown W. Brackets e2ecd1eabd Add memchecks for ReadStruct/WriteStruct. 2015-04-05 18:09:35 -07:00
Unknown W. Brackets 2450724be2 Make Memory::Memcpy() execute memchecks directly. 
This makes it easier to handle breakpoints in HLE.
 2015-04-05 18:09:20 -07:00
Unknown W. Brackets 0fc64dc717 Return an error when the atrac stream is full. 2015-04-05 17:22:38 -07:00
Henrik Rydgård 8fd906672d Default to 2x rendering on some more devices. 2015-04-03 18:22:57 +02:00
Henrik Rydgård b7498f4581 Make some UI adjustments on TV devices 2015-04-03 11:54:24 +02:00
Unknown W. Brackets bdd1db1fa2 x86jit: Handle vmin/vmax and vsge correctly. 
Unfortunately, this boots vmin/vmax from simd, currently.
 2015-03-29 12:24:49 -07:00
Unknown W. Brackets 67d9233de1 Fix some compiler warnings. 
Oops, f format in hle logging wasn't working right.  See #7641.
 2015-03-28 20:50:34 -07:00
Unknown W. Brackets 8d5f843bb8 Cleanup thread start and create logging. 
Also report less cases.
 2015-03-28 14:46:09 -07:00
Unknown W. Brackets fc3d6ff04a Disable reporting for some thread funcs. 
We know they are misused and it's not giving us extra information.
 2015-03-28 14:32:32 -07:00
Unknown W. Brackets 03bd1b9b69 Initialize a few sas values earlier. 
This just makes things a little safer, none of these ought to be used
without Start or similar.
 2015-03-28 13:06:57 -07:00
Unknown W. Brackets 0aaabcaac9 Clear old registered action types on reset. 2015-03-28 13:01:49 -07:00
Unknown W. Brackets c642f92bfb Initialize a few display state values on init. 2015-03-28 13:01:30 -07:00
Unknown W. Brackets 27e27f11ad Shutdown a couple dialogs more correctly. 
This brings them back to none instead of shutdown.
 2015-03-28 13:01:10 -07:00
Unknown W. Brackets ae4811d0d1 Still fudge seek positions for low level. 
Since in this case we're tricking it into reading the same buffer area.
 2015-03-26 22:34:45 -07:00
Unknown W. Brackets 425eed7bea Keep separate track of ffmpeg pos and decode pos. 
FFmpeg buffers, so forcing the pos only makes FFmpeg read in garbage
because it doesn't know that you seeked in the bytestream on it.
 2015-03-26 20:23:37 -07:00
Henrik Rydgård 62e621f8a1 Merge pull request #6976 from unknownbrackets/atrac-minor 
When seeking to atrac positions, force alignment and start from zero
 2015-03-26 00:29:51 +01:00
Unknown W. Brackets c2153ff976 Add new logging in sceKernelCreateThread(). 2015-03-22 21:22:40 -07:00
Unknown W. Brackets 74c6f2696d Add log formatting for 64-bit arg types + stack. 2015-03-22 21:15:13 -07:00
Unknown W. Brackets 110cc119ce Change some logging in the last Callback func. 2015-03-22 20:51:56 -07:00
Unknown W. Brackets 52a37c1330 Actually use the table's arg and ret masks. 2015-03-22 20:51:56 -07:00
Unknown W. Brackets fcf0518223 Update all the HLE tables with arg and ret info. 2015-03-22 20:51:55 -07:00
Unknown W. Brackets 1b2b5f41a9 Fix a typo. 2015-03-22 20:49:43 -07:00
Unknown W. Brackets 2c8199ec73 Make gcc happy when there are no var args. 2015-03-22 20:49:42 -07:00
Unknown W. Brackets 41631eb2b1 Try a different format of HLE logging. 2015-03-22 20:49:42 -07:00
Henrik Rydgård cac05197ed Merge pull request #7623 from sum2012/Atrac-minor- 
Add a logging in sceAtracGetRemainFrame
 2015-03-22 00:32:47 +01:00
sum2012 35c04e1187 Fix tab 2015-03-22 06:35:49 +08:00