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119 Commits
Author SHA1 Message Date
Unknown W. Brackets df2462b1d9 irjit: Implement ll/sc. 
These occur more than I expected in LittleBigPlanet while loading.
 2023-07-29 17:57:44 -07:00
Unknown W. Brackets 9157d992ac jit-ir: Implement cfc1/ctc1. 
This makes it so we can track rounding mode changes.
 2023-07-25 20:33:56 -07:00
Unknown W. Brackets 05360d5c7a riscv: Implement simplest float ops. 2023-07-25 20:33:56 -07:00
Unknown W. Brackets d4e689b096 irjit: Allow IRInterpret() on partial block. 
For later if we want to fallback from native to IR interpret.
 2023-07-16 16:19:53 -07:00
Henrik Rydgård fc62d587c0 Fix whitespace issues 2023-04-02 16:36:39 +02:00
Герман СеменовandHenrik Rydgård 8d5af48efd Core: using if constexpr C++17 optimization 2023-04-02 16:35:57 +02:00
Henrik Rydgård d586ec0d5e Don't create Host objects except in headless/unittest 2023-03-25 10:47:01 +01:00
Henrik Rydgård 700a018ef0 IRInterpreter: Use alignment as access size in exceptions 2023-01-01 20:48:16 +01:00
Henrik Rydgård aa80659530 Memory exception: Add facility to track size 
Might theoretically help in tracking some things down.

Not fully utilized yet, the fault handler needs to extract the
information from the faulting instruction. But we can use it for
GetPointerRange etc.
 2023-01-01 20:30:29 +01:00
Unknown W. Brackets 56ff555309 irjit: Fix unordered float compares. 2022-10-30 21:12:59 -07:00
Unknown W. Brackets 8e7847f6d9 UI: Show return address for exec crashes. 2022-08-21 14:49:34 -07:00
Unknown W. Brackets 90517ace59 irjit: Validate alignment in slow memory mode. 2022-08-21 13:24:10 -07:00
Unknown W. Brackets 6715f41410 irjit: Add constructs for validing mem access. 
Basically to allow slow/fast memory to work with IR, including for
alignment checks.
 2022-08-21 13:01:23 -07:00
Henrik Rydgård cd92151de7 Add ARM64_NEON compile arch flag 
This allows doing ARM64 builds without NEON support, and allows simplifying some checks.
 2022-06-25 07:29:20 +02:00
Unknown W. Brackets cae0815095 jit: Avoid using mips identifier directly. 
Apparently this gets defined on mips systems.
 2021-02-26 07:24:58 -08:00
Unknown W. Brackets 5d60fa0d0d Common: Maintain C++11 support in sign extend. 2021-01-31 08:44:02 -08:00
Unknown W. Brackets 1b00da2f3a Common: Sign extend w/func not chained casts. 
Should be clearer to read and easier to get right.
 2021-01-31 01:25:52 -08:00
Henrik Rydgård 9e41fafd0d Move math and some file and data conversion files out from native to Common. 
Buildfixing

Move some file util files

Buildfix

Move KeyMap.cpp/h to Core where they belong better.

libretro buildfix attempt

Move ini_file

More buildfixes
 2020-10-04 09:12:46 +02:00
Henrik Rydgård 8461ea19b1 Centralize handling of memory exceptions a bit 2020-07-12 15:25:20 +02:00
Unknown W. Brackets 5afc020fbd x86jit: Force INF * 0 to +NAN. 
See #12519 - this is needed for some graphics to render properly.  Seems
to already happen on ARM, so no change to armjit.
 2020-04-06 06:33:39 -07:00
Henrik Rydgård 30831f3ea1 Implement and test clz32, use it in the MIPS interpreter cores. 
This will be useful for our vfpu-dot implementations later.
 2019-06-14 18:39:15 +02:00
Henrik Rydgård 2f26297062 Clean up some more ifdefs 2019-05-10 23:25:57 +02:00
driver1998 5072584781 Fix neon headers for MSVC ARM64 
MSVC uses arm64_neon.h for ARM64, arm_neon.h is ARM32 only.
 2019-05-04 22:45:15 +08:00
Henrik Rydgård b4721fbc44 Temporary workaround for another IR interpreter crash. See #10897 2018-04-11 11:55:12 +02:00
Unknown W. Brackets 6dda053365 irjit: Add dedicated ops for lwl/swl and friends. 
Temporarily removes optimizations.
 2018-01-07 21:05:57 -08:00
Henrik Rydgård 331a8f91e8 Fix that weird unordered compare mode, hopefully 2018-01-04 20:06:26 +01:00
Henrik Rydgård 18be23eccc IR: More fixes. Still something wrong with VFPU compares (not caused by this PR). 2018-01-04 19:38:36 +01:00
Henrik Rydgård ca9050b84c On Linux, can't even include nmmintrin without explicitly enabling SSE 4.2 support. 2018-01-04 18:27:19 +01:00
Henrik Rydgård fe88d12055 IR interpreter: Add some braces to allow variable declaration in the switch cases. 2018-01-04 18:27:19 +01:00
Henrik Rydgård e0cc126d09 Add some more SIMD support to IR interpreter. Mostly just because, but also serves as implementation reference for later code generation backends. 2018-01-04 18:27:19 +01:00
Henrik Rydgård a128624f98 IRInterpreter: Fix bugs in floating point truncation functions 2018-01-04 18:25:54 +01:00
Henrik Rydgård 604b3c3e97 IR Interpreter: Add missing break; to switch case IROp::FSign. 2018-01-04 11:08:56 +01:00
Unknown W. Brackets bc541bd020 irjit: Encode downcount directly as a constant. 
Simpler this way, now.
 2018-01-03 23:32:31 -08:00
Unknown W. Brackets cffb2d61a7 irjit: Embed constant inside IRInst. 
This simplifies a bunch of code and improves compile performance by about
30%, at the cost of a bit more memory.
 2018-01-03 23:24:04 -08:00
Henrik Rydgård 3ac2350ad6 IR Interpreter: Add a comment, minor cleanup, minor SSE stuff. 2018-01-03 16:31:55 +01:00
Unknown W. Brackets 8c2edd432b irjit: Allow continuing from mips break. 
Some games currently generate break instructions, and can be played
otherwise.  Should be fixed, but let's not hard crash.
 2017-12-25 10:21:22 -08:00
Henrik Rydgard b0bd7e3c6f Minor changes for compatibility with VS2017 2017-03-12 17:33:00 +01:00
Henrik RydgårdandGitHub ea6b72d4c9 Merge pull request #8888 from unknownbrackets/warnings 
Warning fixes
 2016-08-06 10:59:06 +02:00
Unknown W. Brackets fd546ff21d Fix some type comparison warnings. 2016-08-05 10:47:45 -07:00
Unknown W. Brackets 9972e5b10a Debugger: Allow logging on CPU breakpoints. 2016-08-04 12:39:29 -07:00
Unknown W. Brackets 4578c3cb54 jit-ir: Implement memory breakpoints. 
These generally work, but likely delay slots will make downcount slightly
off, and won't resume when you hit run again without manually stepping
through them.
 2016-07-02 16:38:30 -07:00
Unknown W. Brackets 6fb34d0bee jit-ir: Add initial breakpoint support. 
No memory breakpoints yet, and cache isn't cleared yet so these don't work
exactly the way you might expect...
 2016-07-01 17:15:57 -07:00
Henrik Rydgard f544364c4a Fix bug in vus2i (thanks unknown), recognize vectors in IR disasm 2016-05-15 23:35:33 +02:00
Unknown W. Brackets 3f0fc2d851 jit-ir: Fix FSat0_1 behavior on -0.0f. 2016-05-15 13:10:49 -07:00
Henrik Rydgard d6c2b6e9ae Most of vi2x 2016-05-15 11:46:01 +02:00
Henrik Rydgard 905af75925 vx2i, vbfy, vsgn 2016-05-15 10:57:43 +02:00
Unknown W. Brackets c606f64f71 jit-ir: Add div/divu instructions. 2016-05-14 19:23:52 -07:00
Unknown W. Brackets 6413b44434 jit-ir: Enable IR for madd(u)/msub(u). 2016-05-14 19:23:51 -07:00
Unknown W. Brackets 4ac773e8b4 jit-ir: Implement bit reverse instruction. 2016-05-14 18:21:42 -07:00
Unknown W. Brackets 1f28d802a3 FreeBSD buildfix. 
We need Common to have the right _M_SSE define.  Also, let's not define
SSE4 until we need it, since we might need ifs.
 2016-05-14 09:06:56 -07:00