Henrik Rydgård
e93c80db4e
Cleaning up our SIMD header includes, using the new header
2024-12-19 16:08:48 +01:00
Henrik Rydgård
96c4a10e8c
Add two new core states, rename RUNNING to RUNNING_CPU and similar for stepping.
2024-12-01 21:04:21 +01:00
Henrik Rydgård
7992ff4627
Make CBreakpoints an object
2024-11-25 00:22:53 +01:00
Henrik Rydgård
d3e9398cb3
Split Core_EnableStepping into Core_Break and Core_Resume
2024-11-03 17:53:42 +01:00
Nemoumbra
ff5877e993
Renamed the IR instruction, new UI button added
2024-09-14 19:46:05 +03:00
Nemoumbra
25f6b01d86
Added the initialization code + UI bindings + logs
2024-09-14 19:46:05 +03:00
Nemoumbra
e3b09bea59
Ported the MIPSLogger's UI + basic integration of MIPSTracer
2024-09-14 19:46:05 +03:00
Nemoumbra
a6be0517dc
New IR instruction added
2024-09-14 19:46:04 +03:00
Henrik Rydgård
9fb97add3f
Bugfixes
2024-07-26 14:22:31 +02:00
Henrik Rydgård
d3e6f19b6d
Comments, log, cleanup
2024-07-22 01:15:35 +02:00
Henrik Rydgård
982a83d867
IRInterpreter: Optimize variable shifts (no need to mask by 0x1f)
2024-06-24 09:30:21 +02:00
Henrik Rydgård
06315ae6ee
IRInterpreter: Slight optimization for fmul
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Just put stuff in temporaries, allows for better codegen
2024-06-24 09:12:57 +02:00
Henrik Rydgård
06e636bfdc
Build and comment fixes
2024-06-19 20:24:59 +02:00
Henrik Rydgård
e64d768113
Implement the same for ARM64
2024-06-19 20:00:36 +02:00
Henrik Rydgård
0080f71ca4
Implement FPU rounding mode support in the IR interpreter for x86/x64
2024-06-19 18:09:38 +02:00
Henrik Rydgård
c9ca3904d3
Combine move-from-gpr and float cast.
2024-06-08 22:59:48 +02:00
Henrik Rydgård
0c246297d2
Create an IR op for a FPRtoGPR + shift-right-8, very common
2024-06-07 21:26:20 +02:00
Henrik Rydgård
da88011805
Specialize a few arithmetic instructions for the interpreter.
2024-06-07 19:32:37 +02:00
Henrik Rydgård
becc145099
Improve code generation for some IRInterpreter ops
2024-06-02 10:25:04 +02:00
Henrik Rydgård
d4e3597ddb
Minor codegen improvement
2024-06-02 10:23:44 +02:00
Henrik Rydgård
3b5c71170c
IRInterpreter: Various SIMD optimization. Move out the reverse-bits implementation
2024-06-01 20:29:03 +02:00
Henrik Rydgård
49b0af20ca
IRInterpreter: Reorder some ops towards the end, trying to keep "hot" ops together
2024-06-01 18:06:31 +02:00
Henrik Rydgård
fae846e52a
Remove the count parameter from IRInterpret. This is a good speed boost!
2024-05-10 23:31:24 +02:00
Henrik Rydgård
092179c42d
More IR interpreter tweaks
2024-05-10 18:41:55 +02:00
Henrik Rydgård
91d9ef9b81
Minor IR interpreter optimization
2024-05-10 18:27:29 +02:00
Henrik Rydgård and GitHub
e5af1f8bd0
Merge pull request #18560 from unknownbrackets/replacement-slice
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HLE: Slice the very slow memset/memcpy variants
2023-12-17 12:35:48 +01:00
Unknown W. Brackets
053831bf4d
HLE: Add mechanics for sliced replacements.
2023-12-16 09:08:58 -08:00
Henrik Rydgård
45aae7b9da
ARM32: Backport a lot of previously 64-bit-only NEON optimizations to ARM32.
2023-11-27 23:51:10 +01:00
Unknown W. Brackets
259734bd47
irjit: Fix likely delay slot breakpoints.
2023-09-03 12:27:10 -07:00
Unknown W. Brackets
e1a1f56f4c
irjit: Cleanup breakpoint ops.
2023-09-03 12:27:10 -07:00
Unknown W. Brackets
c85886c11e
irjit: Use enum for rounding modes.
2023-09-01 22:29:24 -07:00
Unknown W. Brackets
269a57a8b8
irjit: Fix vmin/vmax NAN handling.
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Oops, this needs to be signed.
2023-08-23 06:50:42 -07:00
Unknown W. Brackets
2b36e0a625
irjit: ZeroFpCond -> FpCondFromReg.
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We already have a zero reg, so this is more useful and symmetrical.
2023-08-13 10:40:47 -07:00
Unknown W. Brackets
e73c203984
irjit: Fix Vec4Shuffle overlap issue.
2023-08-08 23:00:39 -07:00
Unknown W. Brackets
79ca880ac7
irjit: Implement vqmul, add Vec4Blend.
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Should be useful more places.
2023-08-06 13:38:00 -07:00
Henrik Rydgård and GitHub
c8447ff4b7
Merge pull request #17801 from unknownbrackets/irjit-vminmax
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irjit: Fix vmin/vmax nan handling
2023-07-30 09:18:25 +02:00
Henrik Rydgård and GitHub
180bda6f6b
Merge pull request #17799 from unknownbrackets/irjit-lsu
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Add ll/sc to IR and x86jit
2023-07-30 09:15:55 +02:00
Unknown W. Brackets
6aa4b0c5e1
irjit: Fix vmin/vmax nan handling.
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Should be relevant to NFS MW and possibly other game bugs.
2023-07-29 19:13:12 -07:00
Unknown W. Brackets
e228748449
irjit: Add FCvtScaledSW to safely scale vi2f.
2023-07-29 18:30:15 -07:00
Unknown W. Brackets
a5a2671af3
irjit: Implement vf2ix.
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Used in LittleBigPlanet when playing intro movies.
2023-07-29 18:01:08 -07:00
Unknown W. Brackets
df2462b1d9
irjit: Implement ll/sc.
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These occur more than I expected in LittleBigPlanet while loading.
2023-07-29 17:57:44 -07:00
Unknown W. Brackets
9157d992ac
jit-ir: Implement cfc1/ctc1.
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This makes it so we can track rounding mode changes.
2023-07-25 20:33:56 -07:00
Unknown W. Brackets
05360d5c7a
riscv: Implement simplest float ops.
2023-07-25 20:33:56 -07:00
Unknown W. Brackets
d4e689b096
irjit: Allow IRInterpret() on partial block.
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For later if we want to fallback from native to IR interpret.
2023-07-16 16:19:53 -07:00
Henrik Rydgård
fc62d587c0
Fix whitespace issues
2023-04-02 16:36:39 +02:00
Герман Семенов and Henrik Rydgård
8d5af48efd
Core: using if constexpr C++17 optimization
2023-04-02 16:35:57 +02:00
Henrik Rydgård
d586ec0d5e
Don't create Host objects except in headless/unittest
2023-03-25 10:47:01 +01:00
Henrik Rydgård
700a018ef0
IRInterpreter: Use alignment as access size in exceptions
2023-01-01 20:48:16 +01:00
Henrik Rydgård
aa80659530
Memory exception: Add facility to track size
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Might theoretically help in tracking some things down.
Not fully utilized yet, the fault handler needs to extract the
information from the faulting instruction. But we can use it for
GetPointerRange etc.
2023-01-01 20:30:29 +01:00
Unknown W. Brackets
56ff555309
irjit: Fix unordered float compares.
2022-10-30 21:12:59 -07:00
Henrik Rydgård