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x86jit: Add Vec4 and Float load/store.

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Unknown W. Brackets authored and Henrik Rydgård committed 2023-08-22 10:39:46 +02:00
1 parent 951c35ba71
commit edcb156897
4 files changed
+30 -7
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Core/MIPS/IR/IRRegCache.cpp
+1 -1
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@@ -907,7 +907,7 @@ void IRNativeRegCacheBase::MapNativeReg(MIPSLoc type, IRNativeReg nreg, IRReg fi
}
// If it's still in a different reg, either discard or possibly transfer.
if (mreg.nReg != -1 && mreg.nReg != nreg) {
if (mreg.nReg != -1 && (mreg.nReg != nreg || mismatch)) {
_assert_msg_(!mreg.isStatic, "Cannot MapNativeReg a static reg to a new reg");
if ((flags & MIPSMap::NOINIT) != MIPSMap::NOINIT) {
// We better not be trying to map to a different nreg if it's in one now.