From ec94498342280ddaacc8c2fa79c71d031d7b5b21 Mon Sep 17 00:00:00 2001 From: "Unknown W. Brackets" Date: Mon, 23 Jun 2014 08:18:56 -0700 Subject: [PATCH] When scanning or relocating, check replacements. Just to make sure we don't wrongly detect the length or unresolve a var wrong etc. --- Core/ELF/ElfReader.cpp | 4 ++-- Core/HLE/sceKernelModule.cpp | 4 ++-- Core/MIPS/MIPSAnalyst.cpp | 14 +++++++------- Core/MIPS/MIPSCodeUtils.cpp | 8 ++++---- Core/MIPS/MIPSStackWalk.cpp | 4 ++-- 5 files changed, 17 insertions(+), 17 deletions(-) diff --git a/Core/ELF/ElfReader.cpp b/Core/ELF/ElfReader.cpp index 5adb156018..e1fe1c6aaa 100644 --- a/Core/ELF/ElfReader.cpp +++ b/Core/ELF/ElfReader.cpp @@ -93,7 +93,7 @@ bool ElfReader::LoadRelocations(Elf32_Rel *rels, int numRelocs) continue; } - u32 op = Memory::Read_Instruction(addr).encoding; + u32 op = Memory::Read_Instruction(addr, true).encoding; const bool log = false; //log=true; @@ -306,7 +306,7 @@ void ElfReader::LoadRelocations2(int rel_seg) ERROR_LOG_REPORT(LOADER, "Rel2: invalid lo16 type! %x", flag); } - op = Memory::Read_Instruction(rel_offset).encoding; + op = Memory::Read_Instruction(rel_offset, true).encoding; DEBUG_LOG(LOADER, "Rel2: %5d: CMD=0x%04X flag=%x type=%d off_seg=%d offset=%08x addr_seg=%d op=%08x\n", rcount, cmd, flag, type, off_seg, rel_base, addr_seg, op); switch(type){ diff --git a/Core/HLE/sceKernelModule.cpp b/Core/HLE/sceKernelModule.cpp index 88528d33ba..aca52c6793 100644 --- a/Core/HLE/sceKernelModule.cpp +++ b/Core/HLE/sceKernelModule.cpp @@ -473,7 +473,7 @@ void WriteVarSymbol(u32 exportAddress, u32 relocAddress, u8 type, bool reverse = static std::vector lastHI16Relocs; static bool lastHI16Processed = true; - u32 relocData = Memory::Read_Instruction(relocAddress).encoding; + u32 relocData = Memory::Read_Instruction(relocAddress, true).encoding; switch (type) { @@ -518,7 +518,7 @@ void WriteVarSymbol(u32 exportAddress, u32 relocAddress, u8 type, bool reverse = // The R_MIPS_LO16 and R_MIPS_HI16 will often be *different* relocAddress values. HI16RelocInfo reloc; reloc.addr = relocAddress; - reloc.data = Memory::Read_Instruction(relocAddress).encoding; + reloc.data = Memory::Read_Instruction(relocAddress, true).encoding; lastHI16Relocs.push_back(reloc); lastHI16Processed = false; break; diff --git a/Core/MIPS/MIPSAnalyst.cpp b/Core/MIPS/MIPSAnalyst.cpp index b904a0ffe5..7c7e99ce1e 100644 --- a/Core/MIPS/MIPSAnalyst.cpp +++ b/Core/MIPS/MIPSAnalyst.cpp @@ -506,7 +506,7 @@ namespace MIPSAnalyst { } bool OpWouldChangeMemory(u32 pc, u32 addr, u32 size) { - const auto op = Memory::Read_Instruction(pc); + const auto op = Memory::Read_Instruction(pc, true); // TODO: Trap sc/ll, svl.q, svr.q? @@ -574,7 +574,7 @@ namespace MIPSAnalyst { } for (u32 addr = address, endAddr = address + MAX_ANALYZE; addr <= endAddr; addr += 4) { - MIPSOpcode op = Memory::Read_Instruction(addr); + MIPSOpcode op = Memory::Read_Instruction(addr, true); MIPSInfo info = MIPSGetInfo(op); MIPSGPReg rs = MIPS_GET_RS(op); @@ -639,7 +639,7 @@ namespace MIPSAnalyst { // Don't think we use this yet. bool IsRegisterUsed(MIPSGPReg reg, u32 addr) { while (true) { - MIPSOpcode op = Memory::Read_Instruction(addr); + MIPSOpcode op = Memory::Read_Instruction(addr, true); MIPSInfo info = MIPSGetInfo(op); if ((info & IN_RS) && (MIPS_GET_RS(op) == reg)) return true; @@ -736,7 +736,7 @@ skip: u32 furthestJumpbackAddr = INVALIDTARGET; for (u32 ahead = fromAddr; ahead < fromAddr + MAX_AHEAD_SCAN; ahead += 4) { - MIPSOpcode aheadOp = Memory::Read_Instruction(ahead); + MIPSOpcode aheadOp = Memory::Read_Instruction(ahead, true); u32 target = GetBranchTargetNoRA(ahead, aheadOp); if (target == INVALIDTARGET && ((aheadOp & 0xFC000000) == 0x08000000)) { target = GetJumpTarget(ahead); @@ -757,7 +757,7 @@ skip: if (closestJumpbackAddr != INVALIDTARGET && furthestJumpbackAddr == INVALIDTARGET) { for (u32 behind = closestJumpbackTarget; behind < fromAddr; behind += 4) { - MIPSOpcode behindOp = Memory::Read_Instruction(behind); + MIPSOpcode behindOp = Memory::Read_Instruction(behind, true); u32 target = GetBranchTargetNoRA(behind, behindOp); if (target == INVALIDTARGET && ((behindOp & 0xFC000000) == 0x08000000)) { target = GetJumpTarget(behind); @@ -812,7 +812,7 @@ skip: continue; } - MIPSOpcode op = Memory::Read_Instruction(addr); + MIPSOpcode op = Memory::Read_Instruction(addr, true); u32 target = GetBranchTargetNoRA(addr, op); if (target != INVALIDTARGET) { isStraightLeaf = false; @@ -835,7 +835,7 @@ skip: // If it's a nearby forward jump, and not a stackless leaf, assume not a tail call. if (sureTarget <= addr + MAX_JUMP_FORWARD && decreasedSp) { // But let's check the delay slot. - MIPSOpcode op = Memory::Read_Instruction(addr + 4); + MIPSOpcode op = Memory::Read_Instruction(addr + 4, true); // addiu sp, sp, +X if ((op & 0xFFFF8000) != 0x27BD0000) { furthestBranch = sureTarget; diff --git a/Core/MIPS/MIPSCodeUtils.cpp b/Core/MIPS/MIPSCodeUtils.cpp index 8e4203b541..6e4c7fbb89 100644 --- a/Core/MIPS/MIPSCodeUtils.cpp +++ b/Core/MIPS/MIPSCodeUtils.cpp @@ -32,7 +32,7 @@ namespace MIPSCodeUtils u32 GetJumpTarget(u32 addr) { - MIPSOpcode op = Memory::Read_Instruction(addr); + MIPSOpcode op = Memory::Read_Instruction(addr, true); if (op != 0) { MIPSInfo info = MIPSGetInfo(op); @@ -50,7 +50,7 @@ namespace MIPSCodeUtils u32 GetBranchTarget(u32 addr) { - MIPSOpcode op = Memory::Read_Instruction(addr); + MIPSOpcode op = Memory::Read_Instruction(addr, true); if (op != 0) { MIPSInfo info = MIPSGetInfo(op); @@ -67,7 +67,7 @@ namespace MIPSCodeUtils u32 GetBranchTargetNoRA(u32 addr) { - MIPSOpcode op = Memory::Read_Instruction(addr); + MIPSOpcode op = Memory::Read_Instruction(addr, true); return GetBranchTargetNoRA(addr, op); } @@ -89,7 +89,7 @@ namespace MIPSCodeUtils u32 GetSureBranchTarget(u32 addr) { - MIPSOpcode op = Memory::Read_Instruction(addr); + MIPSOpcode op = Memory::Read_Instruction(addr, true); if (op != 0) { MIPSInfo info = MIPSGetInfo(op); diff --git a/Core/MIPS/MIPSStackWalk.cpp b/Core/MIPS/MIPSStackWalk.cpp index 5cac3df7c8..b4f8f663f1 100644 --- a/Core/MIPS/MIPSStackWalk.cpp +++ b/Core/MIPS/MIPSStackWalk.cpp @@ -67,7 +67,7 @@ namespace MIPSStackWalk { // It ought to be pretty close. u32 stop = pc - 32 * 4; for (; Memory::IsValidAddress(pc) && pc >= stop; pc -= 4) { - MIPSOpcode op = Memory::Read_Instruction(pc); + MIPSOpcode op = Memory::Read_Instruction(pc, true); // We're looking for a "mov fp, sp" close by a "addiu sp, sp, -N". if (IsMovRegsInstr(op) && _RD == MIPS_REG_FP && (_RS == MIPS_REG_SP || _RT == MIPS_REG_SP)) { @@ -83,7 +83,7 @@ namespace MIPSStackWalk { int ra_offset = -1; u32 stop = entry == INVALIDTARGET ? 0 : entry; for (u32 pc = frame.pc; Memory::IsValidAddress(pc) && pc >= stop; pc -= 4) { - MIPSOpcode op = Memory::Read_Instruction(pc); + MIPSOpcode op = Memory::Read_Instruction(pc, true); // Here's where they store the ra address. if (IsSWInstr(op) && _RT == MIPS_REG_RA && _RS == MIPS_REG_SP) {