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arm64jit: Enable breakpoints.

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Memory breakpoints not yet really tested.
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2018-06-06 17:31:56 -07:00
parent 395ac32d63
commit eb4b59b530
10 changed files with 136 additions and 25 deletions
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Core/MIPS/ARM64/Arm64CompLoadStore.cpp
+3
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@@ -111,6 +111,7 @@ namespace MIPSComp {
void Arm64Jit::Comp_ITypeMemLR(MIPSOpcode op, bool load) {
CONDITIONAL_DISABLE;
CheckMemoryBreakpoint();
int offset = (signed short)(op & 0xFFFF);
MIPSGPReg rt = _RT;
MIPSGPReg rs = _RS;
@@ -119,6 +120,7 @@ namespace MIPSComp {
if (!js.inDelaySlot) {
// Optimisation: Combine to single unaligned load/store
bool isLeft = (o == 34 || o == 42);
CheckMemoryBreakpoint(1);
MIPSOpcode nextOp = GetOffsetInstruction(1);
// Find a matching shift in opposite direction with opposite offset.
if (nextOp == (isLeft ? (op.encoding + (4 << 26) - 3) : (op.encoding - (4 << 26) + 3))) {
@@ -255,6 +257,7 @@ namespace MIPSComp {
void Arm64Jit::Comp_ITypeMem(MIPSOpcode op) {
CONDITIONAL_DISABLE;
CheckMemoryBreakpoint();
int offset = (signed short)(op & 0xFFFF);
bool load = false;