From c3db3d5187330a4091f89e9b7245b57adac0f096 Mon Sep 17 00:00:00 2001 From: "Unknown W. Brackets" Date: Tue, 25 Jul 2023 20:30:05 -0700 Subject: [PATCH] arm64jit: When rouding unset, use nearest. The 0/default rounding mode is nearest, not toward zero. We set hasSetRounding only when fcr31 has a non-zero rounding mode or flush to zero set. --- Core/MIPS/ARM64/Arm64Asm.cpp | 2 +- Core/MIPS/ARM64/Arm64CompFPU.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Core/MIPS/ARM64/Arm64Asm.cpp b/Core/MIPS/ARM64/Arm64Asm.cpp index 9f70435a78..5a0b12ce65 100644 --- a/Core/MIPS/ARM64/Arm64Asm.cpp +++ b/Core/MIPS/ARM64/Arm64Asm.cpp @@ -312,7 +312,7 @@ void Arm64Jit::GenerateFixedCode(const JitOptions &jo) { // Leave this at the end, add more stuff above. if (enableDisasm) { - std::vector lines = DisassembleArm64(start, GetCodePtr() - start); + std::vector lines = DisassembleArm64(start, (int)(GetCodePtr() - start)); for (auto s : lines) { INFO_LOG(JIT, "%s", s.c_str()); } diff --git a/Core/MIPS/ARM64/Arm64CompFPU.cpp b/Core/MIPS/ARM64/Arm64CompFPU.cpp index c1cd969582..2756f5e8ed 100644 --- a/Core/MIPS/ARM64/Arm64CompFPU.cpp +++ b/Core/MIPS/ARM64/Arm64CompFPU.cpp @@ -292,7 +292,7 @@ void Arm64Jit::Comp_FPU2op(MIPSOpcode op) { fp.FMOV(fpr.R(fd), S0); } else { fp.FCMP(fpr.R(fs), fpr.R(fs)); - fp.FCVTS(fpr.R(fd), fpr.R(fs), ROUND_Z); + fp.FCVTS(fpr.R(fd), fpr.R(fs), ROUND_N); FixupBranch skip_nan = B(CC_VC); MOVI2R(SCRATCH1, 0x7FFFFFFF); fp.FMOV(fpr.R(fd), SCRATCH1);