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irjit: Implement ll/sc.
These occur more than I expected in LittleBigPlanet while loading.
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@@ -105,6 +105,30 @@ namespace MIPSComp {
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}
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}
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void IRFrontend::Comp_StoreSync(MIPSOpcode op) {
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CONDITIONAL_DISABLE(LSU);
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int offset = _IMM16;
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MIPSGPReg rt = _RT;
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MIPSGPReg rs = _RS;
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// Note: still does something even if loading to zero.
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CheckMemoryBreakpoint(rs, offset);
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switch (op >> 26) {
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case 48: // ll
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ir.Write(IROp::Load32Linked, rt, rs, ir.AddConstant(offset));
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break;
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case 56: // sc
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ir.Write(IROp::Store32Conditional, rt, rs, ir.AddConstant(offset));
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break;
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default:
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INVALIDOP;
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}
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}
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void IRFrontend::Comp_Cache(MIPSOpcode op) {
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CONDITIONAL_DISABLE(LSU);
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