From a29a35b91a996f96d8cb72dd7557a506af94c39f Mon Sep 17 00:00:00 2001 From: "Unknown W. Brackets" Date: Sun, 6 Aug 2023 08:28:25 -0700 Subject: [PATCH 1/2] irjit: Fix mfvc eating prefixes. It doesn't and shouldn't, which is why it's marked as not. --- Core/MIPS/IR/IRCompVFPU.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Core/MIPS/IR/IRCompVFPU.cpp b/Core/MIPS/IR/IRCompVFPU.cpp index c902951d96..cd63802284 100644 --- a/Core/MIPS/IR/IRCompVFPU.cpp +++ b/Core/MIPS/IR/IRCompVFPU.cpp @@ -1013,6 +1013,10 @@ namespace MIPSComp { void IRFrontend::Comp_Mftv(MIPSOpcode op) { CONDITIONAL_DISABLE(VFPU_XFER); + // Vector move from VFPU / from VFPU ctrl (no prefixes) + // gpr = S + // gpr = VFPU_CTRL[i] + int imm = op & 0xFF; MIPSGPReg rt = _RT; switch ((op >> 21) & 0x1f) { @@ -1067,8 +1071,6 @@ namespace MIPSComp { default: INVALIDOP; } - // This op is marked not to auto-eat prefix so we must do it manually. - EatPrefix(); } void IRFrontend::Comp_Vmfvc(MIPSOpcode op) { From a32889d3ca0a0ad5eff0a32af14f0b38137e58e6 Mon Sep 17 00:00:00 2001 From: "Unknown W. Brackets" Date: Sun, 6 Aug 2023 08:36:19 -0700 Subject: [PATCH 2/2] irjit: Consistently dirty vfpuctrl in IR. --- Core/MIPS/IR/IRPassSimplify.cpp | 26 ++++++++++++++++++++++++++ Core/MIPS/IR/IRRegCache.cpp | 2 ++ 2 files changed, 28 insertions(+) diff --git a/Core/MIPS/IR/IRPassSimplify.cpp b/Core/MIPS/IR/IRPassSimplify.cpp index c595d26ef9..d825cffb23 100644 --- a/Core/MIPS/IR/IRPassSimplify.cpp +++ b/Core/MIPS/IR/IRPassSimplify.cpp @@ -716,6 +716,20 @@ bool PropagateConstants(const IRWriter &in, IRWriter &out, const IROptions &opts break; case IROp::SetCtrlVFPU: + gpr.MapDirty(IRREG_VFPU_CTRL_BASE + inst.dest); + goto doDefault; + + case IROp::SetCtrlVFPUReg: + if (gpr.IsImm(inst.src1)) { + out.Write(IROp::SetCtrlVFPU, inst.dest, out.AddConstant(gpr.GetImm(inst.src1))); + } else { + gpr.MapDirtyIn(IRREG_VFPU_CTRL_BASE + inst.dest, inst.src1); + out.Write(inst); + } + break; + + case IROp::SetCtrlVFPUFReg: + gpr.MapDirty(IRREG_VFPU_CTRL_BASE + inst.dest); goto doDefault; case IROp::FCvtWS: @@ -777,6 +791,18 @@ bool PropagateConstants(const IRWriter &in, IRWriter &out, const IROptions &opts gpr.MapDirtyIn(inst.dest, IRREG_VFPU_CTRL_BASE + inst.src1); goto doDefault; + case IROp::FCmpVfpuBit: + gpr.MapDirty(IRREG_VFPU_CC); + goto doDefault; + + case IROp::FCmovVfpuCC: + gpr.MapIn(IRREG_VFPU_CC); + goto doDefault; + + case IROp::FCmpVfpuAggregate: + gpr.MapDirtyIn(IRREG_VFPU_CC, IRREG_VFPU_CC); + goto doDefault; + case IROp::CallReplacement: case IROp::Break: case IROp::Syscall: diff --git a/Core/MIPS/IR/IRRegCache.cpp b/Core/MIPS/IR/IRRegCache.cpp index d731c51a74..d3bb519d04 100644 --- a/Core/MIPS/IR/IRRegCache.cpp +++ b/Core/MIPS/IR/IRRegCache.cpp @@ -1,4 +1,5 @@ #include +#include "Common/Log.h" #include "Core/MIPS/IR/IRRegCache.h" #include "Core/MIPS/IR/IRInst.h" @@ -7,6 +8,7 @@ void IRRegCache::Flush(IRReg rd) { return; } if (reg_[rd].isImm) { + _assert_((rd > 0 && rd < 32) || (rd >= IRTEMP_0 && rd < IRREG_VFPU_CTRL_BASE)); ir_->WriteSetConstant(rd, reg_[rd].immVal); reg_[rd].isImm = false; }