diff --git a/Core/MIPS/RiscV/RiscVCompALU.cpp b/Core/MIPS/RiscV/RiscVCompALU.cpp
index 2e4a7a248b..fb9e6e2269 100644
--- a/Core/MIPS/RiscV/RiscVCompALU.cpp
+++ b/Core/MIPS/RiscV/RiscVCompALU.cpp
@@ -66,7 +66,7 @@ void RiscVJit::CompIR_Arith(IRInst inst) {
 		if ((int32_t)inst.constant >= -2048 && (int32_t)inst.constant <= 2047) {
 			// Typical of stack pointer updates.
 			if (gpr.IsMappedAsPointer(inst.src1) && inst.dest == inst.src1 && allowPtrMath) {
-				gpr.MarkDirty(gpr.RPtr(inst.dest));
+				gpr.MarkPtrDirty(gpr.RPtr(inst.dest));
 				ADDI(gpr.RPtr(inst.dest), gpr.RPtr(inst.dest), inst.constant);
 			} else {
 				gpr.MapDirtyIn(inst.dest, inst.src1);
diff --git a/Core/MIPS/RiscV/RiscVRegCache.cpp b/Core/MIPS/RiscV/RiscVRegCache.cpp
index 52c3b90d23..1918ed5ab3 100644
--- a/Core/MIPS/RiscV/RiscVRegCache.cpp
+++ b/Core/MIPS/RiscV/RiscVRegCache.cpp
@@ -181,6 +181,17 @@ void RiscVRegCache::MarkDirty(RiscVReg reg) {
 	}
 }
 
+void RiscVRegCache::MarkPtrDirty(RiscVReg reg) {
+	// Can't mark X0 dirty.
+	_dbg_assert_(reg > X0 && reg <= X31);
+	ar[reg].isDirty = true;
+	if (ar[reg].mipsReg != IRREG_INVALID) {
+		_dbg_assert_(mr[ar[reg].mipsReg].loc == MIPSLoc::RVREG_AS_PTR);
+	} else {
+		_dbg_assert_(ar[reg].pointerified);
+	}
+}
+
 void RiscVRegCache::SetRegImm(RiscVReg reg, u64 imm) {
 	_dbg_assert_(reg != R_ZERO || imm == 0);
 	_dbg_assert_(reg >= X0 && reg <= X31);
diff --git a/Core/MIPS/RiscV/RiscVRegCache.h b/Core/MIPS/RiscV/RiscVRegCache.h
index 326332d620..96a8272aef 100644
--- a/Core/MIPS/RiscV/RiscVRegCache.h
+++ b/Core/MIPS/RiscV/RiscVRegCache.h
@@ -118,6 +118,7 @@ public:
 	bool IsInRAM(IRRegIndex reg);
 
 	void MarkDirty(RiscVGen::RiscVReg reg);
+	void MarkPtrDirty(RiscVGen::RiscVReg reg);
 	void MapIn(IRRegIndex rs);
 	void MapInIn(IRRegIndex rd, IRRegIndex rs);
 	void MapDirtyIn(IRRegIndex rd, IRRegIndex rs, bool avoidLoad = true);