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ARM/ARM64: Ignore invalid immediate addresses in delay slots, which may be conditional.

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Should do something in x86's safe mem too, but leaving for later.

Replaces #11824
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Henrik Rydgård committed 2019-02-23 10:15:09 +01:00
1 parent 50de04a290
commit c80dd44da8
2 files changed
+25 -10
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Core/MIPS/ARM/ArmCompLoadStore.cpp
+11 -2
View File
@@ -179,8 +179,17 @@ namespace MIPSComp
return;
}
_dbg_assert_msg_(JIT, !gpr.IsImm(rs), "Invalid immediate address? CPU bug?");
load ? gpr.MapDirtyIn(rt, rs, false) : gpr.MapInIn(rt, rs);
// This gets hit in a few games, as a result of never-taken delay slots (some branch types
// conditionally execute the delay slot instructions). Ignore in those cases.
if (!js.inDelaySlot) {
_dbg_assert_msg_(JIT, !gpr.IsImm(rs), "Invalid immediate address %08x? CPU bug?", iaddr);
}
if (load) {
gpr.MapDirtyIn(rt, rs, false);
} else {
gpr.MapInIn(rt, rs);
}
if (!g_Config.bFastMemory && rs != MIPS_REG_SP) {
SetCCAndR0ForSafeAddress(rs, offset, SCRATCHREG2, true);