From 5c7c57dd3f65411f9e9b1a8f11b9a1dd9dc1c3ec Mon Sep 17 00:00:00 2001 From: "Unknown W. Brackets" Date: Thu, 19 Sep 2013 00:28:57 -0700 Subject: [PATCH 1/3] Oops, typo. --- Core/HLE/sceCtrl.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Core/HLE/sceCtrl.cpp b/Core/HLE/sceCtrl.cpp index e0e4dbd13a..dba069beef 100644 --- a/Core/HLE/sceCtrl.cpp +++ b/Core/HLE/sceCtrl.cpp @@ -376,7 +376,7 @@ u32 sceCtrlSetSamplingCycle(u32 cycle) int sceCtrlGetSamplingCycle(u32 cyclePtr) { - DEBUG_LOG(SCECTRL, "sceCtrlSetSamplingCycle(%08x)", cyclePtr); + DEBUG_LOG(SCECTRL, "sceCtrlGetSamplingCycle(%08x)", cyclePtr); if (Memory::IsValidAddress(cyclePtr)) Memory::Write_U32(ctrlCycle, cyclePtr); return 0; From 54f2bc8262b0b9378ea8fa5479c5e847321c33e2 Mon Sep 17 00:00:00 2001 From: "Unknown W. Brackets" Date: Thu, 19 Sep 2013 00:29:19 -0700 Subject: [PATCH 2/3] Don't frameskip unthrottle in headless. Could make graphic tests wrong or something. --- headless/Headless.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/headless/Headless.cpp b/headless/Headless.cpp index 4dae410743..41be9205b4 100644 --- a/headless/Headless.cpp +++ b/headless/Headless.cpp @@ -323,6 +323,7 @@ int main(int argc, const char* argv[]) g_Config.iButtonPreference = PSP_SYSTEMPARAM_BUTTON_CROSS; g_Config.iLockParentalLevel = 9; g_Config.iInternalResolution = 1; + g_Config.bFrameSkipUnthrottle = false; #if defined(ANDROID) #elif defined(BLACKBERRY) || defined(__SYMBIAN32__) @@ -361,7 +362,7 @@ int main(int argc, const char* argv[]) if (!failedTests.empty()) { printf("Failed tests:\n"); - for (int i = 0; i < failedTests.size(); ++i) { + for (size_t i = 0; i < failedTests.size(); ++i) { printf(" %s\n", failedTests[i].c_str()); } } From 2751da1cecc6735f70d7f4c9a22dd3f84e679515 Mon Sep 17 00:00:00 2001 From: "Unknown W. Brackets" Date: Thu, 19 Sep 2013 00:29:50 -0700 Subject: [PATCH 3/3] Cut down on work in regcache init on x86. Very tiny tiny optimization for games, but 8-10% optimization for tests. --- Common/x64Emitter.h | 13 ++++++++----- Core/MIPS/x86/RegCache.cpp | 10 +++++----- Core/MIPS/x86/RegCacheFPU.cpp | 15 ++++++++++----- 3 files changed, 23 insertions(+), 15 deletions(-) diff --git a/Common/x64Emitter.h b/Common/x64Emitter.h index 1470765450..7c278dc581 100644 --- a/Common/x64Emitter.h +++ b/Common/x64Emitter.h @@ -150,8 +150,6 @@ struct OpArg bool IsImm() const {return scale == SCALE_IMM8 || scale == SCALE_IMM16 || scale == SCALE_IMM32 || scale == SCALE_IMM64;} bool IsSimpleReg() const {return scale == SCALE_NONE;} bool IsSimpleReg(X64Reg reg) const { - if (!IsSimpleReg()) - return false; return GetSimpleReg() == reg; } @@ -182,9 +180,14 @@ struct OpArg return INVALID_REG; } - u32 GetImmValue() const { - return (u32)offset; - } + u32 GetImmValue() const { + return (u32)offset; + } + + // For loops. + void IncreaseOffset(int sz) { + offset += sz; + } private: u8 scale; u16 offsetOrBaseReg; diff --git a/Core/MIPS/x86/RegCache.cpp b/Core/MIPS/x86/RegCache.cpp index ff4ebda424..1748e6a57c 100644 --- a/Core/MIPS/x86/RegCache.cpp +++ b/Core/MIPS/x86/RegCache.cpp @@ -56,11 +56,11 @@ void GPRRegCache::Start(MIPSState *mips, MIPSAnalyst::AnalysisResults &stats) { xregs[i].dirty = false; xregs[i].allocLocked = false; } + memset(regs, 0, sizeof(regs)); + OpArg base = GetDefaultLocation(MIPS_REG_ZERO); for (int i = 0; i < NUM_MIPS_GPRS; i++) { - const MIPSGPReg r = MIPSGPReg(i); - regs[i].location = GetDefaultLocation(r); - regs[i].away = false; - regs[i].locked = false; + regs[i].location = base; + base.IncreaseOffset(sizeof(u32)); } // todo: sort to find the most popular regs @@ -245,7 +245,7 @@ void GPRRegCache::BindToRegister(MIPSGPReg i, bool doLoad, bool makeDirty) { emit->MOV(32, newloc, regs[i].location); } for (int j = 0; j < 32; j++) { - if (i != MIPSGPReg(j) && regs[j].location.IsSimpleReg() && regs[j].location.GetSimpleReg() == xr) { + if (i != MIPSGPReg(j) && regs[j].location.IsSimpleReg(xr)) { ERROR_LOG(JIT, "BindToRegister: Strange condition"); Crash(); } diff --git a/Core/MIPS/x86/RegCacheFPU.cpp b/Core/MIPS/x86/RegCacheFPU.cpp index 4b430fa053..b8767479d7 100644 --- a/Core/MIPS/x86/RegCacheFPU.cpp +++ b/Core/MIPS/x86/RegCacheFPU.cpp @@ -35,11 +35,16 @@ void FPURegCache::Start(MIPSState *mips, MIPSAnalyst::AnalysisResults &stats) { xregs[i].mipsReg = -1; xregs[i].dirty = false; } - for (int i = 0; i < NUM_MIPS_FPRS; i++) { - regs[i].location = GetDefaultLocation(i); - regs[i].away = false; - regs[i].locked = false; - regs[i].tempLocked = false; + memset(regs, 0, sizeof(regs)); + OpArg base = GetDefaultLocation(0); + for (int i = 0; i < 32; i++) { + regs[i].location = base; + base.IncreaseOffset(sizeof(float)); + } + base = GetDefaultLocation(32); + for (int i = 32; i < NUM_MIPS_FPRS; i++) { + regs[i].location = base; + base.IncreaseOffset(sizeof(float)); } }