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update ppc jit
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@@ -41,7 +41,7 @@ void Jit::SetRegToEffectiveAddress(PpcGen::PPCReg r, int rs, s16 offset) {
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}
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}
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void Jit::Comp_ITypeMem(u32 op) {
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void Jit::Comp_ITypeMem(MIPSOpcode op) {
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CONDITIONAL_DISABLE;
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int offset = (signed short)(op&0xFFFF);
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bool load = false;
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@@ -120,13 +120,13 @@ void Jit::Comp_ITypeMem(u32 op) {
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if (!js.inDelaySlot) {
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// Optimisation: Combine to single unaligned load/store
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bool isLeft = (o == 34 || o == 42);
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u32 nextOp = Memory::Read_Instruction(js.compilerPC + 4);
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MIPSOpcode nextOp = Memory::Read_Instruction(js.compilerPC + 4);
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// Find a matching shift in opposite direction with opposite offset.
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if (nextOp == (isLeft ? (op + (4<<26) - 3)
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: (op - (4<<26) + 3)))
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if (nextOp == (isLeft ? (op.encoding + (4<<26) - 3)
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: (op.encoding - (4<<26) + 3)))
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{
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EatInstruction(nextOp);
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nextOp = ((load ? 35 : 43) << 26) | ((isLeft ? nextOp : op) & 0x3FFFFFF); //lw, sw
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nextOp = MIPSOpcode(((load ? 35 : 43) << 26) | ((isLeft ? nextOp : op) & 0x03FFFFFF)); //lw, sw
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Comp_ITypeMem(nextOp);
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return;
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}
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