VFPU: vsqrt, vrsq, vrcp and vnrcp are exact in every backend

These went through the host's sqrt and division everywhere except the
interpreter's vrcp and vnrcp (vsqrt and vrsq there only behind
USE_VFPU_SQRT, now gone). They now always give the PSP's bits: the IR
gets FVSqrt (FSqrt stays the FPU's IEEE sqrt.s), and FRSqrt and FRecip,
which only the VFPU emits, become vfpu_rsqrt and vfpu_rcp; the IR
interpreter and the x64, arm64, RISC-V and LoongArch backends call them.
The old JITs call them directly, the ARM ones keeping the lanes in
callee-saved registers across the calls. cpu/vfpu/exact now passes on every core.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>

Core/MIPS/IR/IRNativeCommon.cpp

@@ -432,6 +432,7 @@ void IRNativeBackend::CompileIRInst(IRInst inst) {
 	case IROp::FRSqrt:
 	case IROp::FRecip:
 	case IROp::FAsin:
+	case IROp::FVSqrt:
 		CompIR_FSpecial(inst);
 		break;