From 7a86ca2890645224b2e2b869235e003f403cb2f4 Mon Sep 17 00:00:00 2001 From: "Unknown W. Brackets" Date: Mon, 25 Nov 2013 01:03:22 -0800 Subject: [PATCH] Mask block transfer stride correctly per tests. 1024 is valid, but nothing higher. May help graphics in some games. --- GPU/GPUState.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/GPU/GPUState.h b/GPU/GPUState.h index 4af00e9caf..de31c0554d 100644 --- a/GPU/GPUState.h +++ b/GPU/GPUState.h @@ -384,11 +384,13 @@ struct GPUgstate // Transfers u32 getTransferSrcAddress() const { return (transfersrc & 0xFFFFF0) | ((transfersrcw & 0xFF0000) << 8); } - u32 getTransferSrcStride() const { return transfersrcw & 0x3F8; } + // Bits 0xf800 are ignored, > 0x400 is treated as 0. + u32 getTransferSrcStride() const { int stride = transfersrcw & 0x7F8; return stride > 0x400 ? 0 : stride; } int getTransferSrcX() const { return (transfersrcpos >> 0) & 0x3FF; } int getTransferSrcY() const { return (transfersrcpos >> 10) & 0x3FF; } u32 getTransferDstAddress() const { return (transferdst & 0xFFFFF0) | ((transferdstw & 0xFF0000) << 8); } - u32 getTransferDstStride() const { return transferdstw & 0x3F8; } + // Bits 0xf800 are ignored, > 0x400 is treated as 0. + u32 getTransferDstStride() const { int stride = transferdstw & 0x7F8; return stride > 0x400 ? 0 : stride; } int getTransferDstX() const { return (transferdstpos >> 0) & 0x3FF; } int getTransferDstY() const { return (transferdstpos >> 10) & 0x3FF; } int getTransferWidth() const { return ((transfersize >> 0) & 0x3FF) + 1; }