From 76072808373114c47c64f3ed7a3a207bee1f60bd Mon Sep 17 00:00:00 2001
From: "Unknown W. Brackets" <checkins@unknownbrackets.org>
Date: Sun, 3 Sep 2023 12:20:16 -0700
Subject: [PATCH] arm64jit: Implement just the most basic ops.

This improves the slowness a good bit.
---
 Core/MIPS/ARM64/Arm64IRCompALU.cpp    | 27 +++++++++++++++++++++++++++
 Core/MIPS/ARM64/Arm64IRCompSystem.cpp | 21 ++++++++++++++++++++-
 2 files changed, 47 insertions(+), 1 deletion(-)

diff --git a/Core/MIPS/ARM64/Arm64IRCompALU.cpp b/Core/MIPS/ARM64/Arm64IRCompALU.cpp
index f7cefcc723..b0b994db36 100644
--- a/Core/MIPS/ARM64/Arm64IRCompALU.cpp
+++ b/Core/MIPS/ARM64/Arm64IRCompALU.cpp
@@ -51,8 +51,29 @@ void Arm64JitBackend::CompIR_Arith(IRInst inst) {
 	switch (inst.op) {
 	case IROp::Add:
 	case IROp::Sub:
+		CompIR_Generic(inst);
+		break;
+
 	case IROp::AddConst:
+		if (regs_.IsGPRMappedAsPointer(inst.dest) && inst.dest == inst.src1 && allowPtrMath) {
+			regs_.MarkGPRAsPointerDirty(inst.dest);
+			ADDI2R(regs_.RPtr(inst.dest), regs_.RPtr(inst.src1), (int)inst.constant, SCRATCH1_64);
+		} else {
+			regs_.Map(inst);
+			ADDI2R(regs_.R(inst.dest), regs_.R(inst.src1), inst.constant, SCRATCH1);
+		}
+		break;
+
 	case IROp::SubConst:
+		if (regs_.IsGPRMappedAsPointer(inst.dest) && inst.dest == inst.src1 && allowPtrMath) {
+			regs_.MarkGPRAsPointerDirty(inst.dest);
+			SUBI2R(regs_.RPtr(inst.dest), regs_.RPtr(inst.src1), (int)inst.constant, SCRATCH1_64);
+		} else {
+			regs_.Map(inst);
+			SUBI2R(regs_.R(inst.dest), regs_.R(inst.src1), inst.constant, SCRATCH1);
+		}
+		break;
+
 	case IROp::Neg:
 		CompIR_Generic(inst);
 		break;
@@ -68,6 +89,12 @@ void Arm64JitBackend::CompIR_Assign(IRInst inst) {
 
 	switch (inst.op) {
 	case IROp::Mov:
+		if (inst.dest != inst.src1) {
+			regs_.Map(inst);
+			MOV(regs_.R(inst.dest), regs_.R(inst.src1));
+		}
+		break;
+
 	case IROp::Ext8to32:
 	case IROp::Ext16to32:
 		CompIR_Generic(inst);
diff --git a/Core/MIPS/ARM64/Arm64IRCompSystem.cpp b/Core/MIPS/ARM64/Arm64IRCompSystem.cpp
index be4400f465..01ec22bcc5 100644
--- a/Core/MIPS/ARM64/Arm64IRCompSystem.cpp
+++ b/Core/MIPS/ARM64/Arm64IRCompSystem.cpp
@@ -47,11 +47,30 @@ void Arm64JitBackend::CompIR_Basic(IRInst inst) {
 
 	switch (inst.op) {
 	case IROp::Downcount:
+		SUBI2R(DOWNCOUNTREG, DOWNCOUNTREG, (s64)(s32)inst.constant, SCRATCH1);
+		break;
+
 	case IROp::SetConst:
+		regs_.SetGPRImm(inst.dest, inst.constant);
+		break;
+
 	case IROp::SetConstF:
+	{
+		regs_.Map(inst);
+		float f;
+		memcpy(&f, &inst.constant, sizeof(f));
+		fp_.MOVI2F(regs_.F(inst.dest), f, SCRATCH1);
+		break;
+	}
+
 	case IROp::SetPC:
+		regs_.Map(inst);
+		MovToPC(regs_.R(inst.src1));
+		break;
+
 	case IROp::SetPCConst:
-		CompIR_Generic(inst);
+		MOVI2R(SCRATCH1, inst.constant);
+		MovToPC(SCRATCH1);
 		break;
 
 	default: