ME: Let kernel code on the main CPU reach RAM and VRAM through kseg1

Yabause-PSP's me.prx ORs 0xA0000000 onto its own addresses to share a
buffer with the ME uncached, which is 0xA8xxxxxx for a module in kernel
RAM. The main CPU's space has no views there, so it crashed.

All of kernel segment 1 (0xA0000000-0xBFFFFFFF) now counts as MMIO, and a
device below the hardware registers maps RAM and VRAM onto their uncached
mirrors at 0x40000000. The main CPU's native kernel loads and stores send
the whole segment to that path; the ME keeps 0xBC000000 as the boundary,
since its space maps the rest.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
This commit is contained in:
Henrik RydgårdandClaude Opus 5.5 committed 2026-10-21 12:50:46 +02:00
1 parent e906b9f700
commit 657e99fcbf
4 files changed
+54 -7

No files matched your search

+4 -2
View File
@@ -409,9 +409,11 @@ inline bool IsDepthTexVRAMAddress(const u32 address) {
return ((address & 0xBFE00000) == 0x04200000) || ((address & 0xBFE00000) == 0x04600000);
}
// TODO: To re-evaluate.
// Kernel segment 1 (0xA0000000-0xBFFFFFFF): the hardware registers from 0xBC000000, and below them
// uncached RAM and VRAM, which only the Media Engine's space maps. Kernel code reaches the rest
// through MMIO::Read/Write.
inline bool IsMMIOAccess(const u32 address) {
return ((address & 0xFC000000) == 0xBC000000);
return (address & 0xE0000000) == 0xA0000000;
}
// 0x08000000 -> 0x08800000