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ME: Let kernel code on the main CPU reach RAM and VRAM through kseg1
Yabause-PSP's me.prx ORs 0xA0000000 onto its own addresses to share a buffer with the ME uncached, which is 0xA8xxxxxx for a module in kernel RAM. The main CPU's space has no views there, so it crashed. All of kernel segment 1 (0xA0000000-0xBFFFFFFF) now counts as MMIO, and a device below the hardware registers maps RAM and VRAM onto their uncached mirrors at 0x40000000. The main CPU's native kernel loads and stores send the whole segment to that path; the ME keeps 0xBC000000 as the boundary, since its space maps the rest. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
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@@ -409,9 +409,11 @@ inline bool IsDepthTexVRAMAddress(const u32 address) {
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return ((address & 0xBFE00000) == 0x04200000) || ((address & 0xBFE00000) == 0x04600000);
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}
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// TODO: To re-evaluate.
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// Kernel segment 1 (0xA0000000-0xBFFFFFFF): the hardware registers from 0xBC000000, and below them
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// uncached RAM and VRAM, which only the Media Engine's space maps. Kernel code reaches the rest
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// through MMIO::Read/Write.
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inline bool IsMMIOAccess(const u32 address) {
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return ((address & 0xFC000000) == 0xBC000000);
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return (address & 0xE0000000) == 0xA0000000;
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}
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// 0x08000000 -> 0x08800000
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