diff --git a/Core/MIPS/ARM/ArmCompLoadStore.cpp b/Core/MIPS/ARM/ArmCompLoadStore.cpp
index 5e4be873c9..6a10aa31ca 100644
--- a/Core/MIPS/ARM/ArmCompLoadStore.cpp
+++ b/Core/MIPS/ARM/ArmCompLoadStore.cpp
@@ -385,8 +385,6 @@ namespace MIPSComp
 	}
 
 	void Jit::Comp_Cache(MIPSOpcode op) {
-		CONDITIONAL_DISABLE;
-		// TODO: Could use this as a hint, and technically required to handle icache, etc.
-		// But right now Int_Cache does nothing, so let's not even call it.
+		DISABLE;
 	}
 }