From 521335cb2aaee382df1e130cf1f2dcc12dff35a3 Mon Sep 17 00:00:00 2001
From: "Unknown W. Brackets" <checkins@unknownbrackets.org>
Date: Mon, 2 Oct 2023 20:26:07 -0700
Subject: [PATCH] x86: Fix 32-bit IR jit block entry.

---
 Core/MIPS/x86/X64IRAsm.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Core/MIPS/x86/X64IRAsm.cpp b/Core/MIPS/x86/X64IRAsm.cpp
index 2e095c4c12..86cb3929cb 100644
--- a/Core/MIPS/x86/X64IRAsm.cpp
+++ b/Core/MIPS/x86/X64IRAsm.cpp
@@ -247,7 +247,7 @@ void X64JitBackend::GenerateFixedCode(MIPSState *mipsState) {
 			FixupBranch needsCompile = J_CC(CC_NE);
 				// We don't mask here - that's baked into jitbase.
 #if PPSSPP_ARCH(X86)
-				LEA(32, SCRATCH1, MDisp(SCRATCH1, (u32)GetBasePtr() - MIPS_EMUHACK_VALUE_MASK));
+				LEA(32, SCRATCH1, MDisp(SCRATCH1, (u32)GetBasePtr() - MIPS_EMUHACK_OPCODE));
 #elif PPSSPP_ARCH(AMD64)
 				if (jitbaseInR15) {
 					ADD(64, R(SCRATCH1), R(JITBASEREG));