diff --git a/Core/MIPS/IR/IRJit.h b/Core/MIPS/IR/IRJit.h
index e26f1c2439..65da0f8e26 100644
--- a/Core/MIPS/IR/IRJit.h
+++ b/Core/MIPS/IR/IRJit.h
@@ -17,6 +17,8 @@
 
 #pragma once
 
+#include <cstring>
+
 #include "Common/CPUDetect.h"
 #include "Core/MIPS/JitCommon/JitState.h"
 #include "Core/MIPS/JitCommon/JitBlockCache.h"
diff --git a/Core/MIPS/IR/IRPassSimplify.cpp b/Core/MIPS/IR/IRPassSimplify.cpp
index 5eb1ea8001..9110ae55f7 100644
--- a/Core/MIPS/IR/IRPassSimplify.cpp
+++ b/Core/MIPS/IR/IRPassSimplify.cpp
@@ -60,6 +60,10 @@ bool PropagateConstants(const IRWriter &in, IRWriter &out) {
 	for (int i = 0; i < (int)in.GetInstructions().size(); i++) {
 		IRInst inst = in.GetInstructions()[i];
 		bool symmetric = true;
+		if (out.GetConstants().size() > 128) {
+			// Avoid causing a constant explosion.
+			goto doDefault;
+		}
 		switch (inst.op) {
 		case IROp::SetConst:
 			gpr.SetImm(inst.dest, constants[inst.src1]);
diff --git a/Core/MemMapFunctions.cpp b/Core/MemMapFunctions.cpp
index 112ae7093c..7ffc80dc9a 100644
--- a/Core/MemMapFunctions.cpp
+++ b/Core/MemMapFunctions.cpp
@@ -123,7 +123,7 @@ inline void WriteToHardware(u32 address, const T data) {
 		*(T*)GetPointerUnchecked(address) = data;
 	} else {
 		// In jit, we only flush PC when bIgnoreBadMemAccess is off.
-		if (g_Config.iCpuCore != CPU_CORE_INTERPRETER && g_Config.bIgnoreBadMemAccess) {
+		if (g_Config.iCpuCore == CPU_CORE_JIT && g_Config.bIgnoreBadMemAccess) {
 			WARN_LOG(MEMMAP, "WriteToHardware: Invalid address %08x", address);
 		} else {
 			WARN_LOG(MEMMAP, "WriteToHardware: Invalid address %08x	PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);