diff --git a/Core/MIPS/x86/JitSafeMem.cpp b/Core/MIPS/x86/JitSafeMem.cpp index 670af75d9f..086ac7a5c9 100644 --- a/Core/MIPS/x86/JitSafeMem.cpp +++ b/Core/MIPS/x86/JitSafeMem.cpp @@ -239,6 +239,9 @@ void JitSafeMem::DoSlowWrite(const void *safeFunc, const OpArg src, int suboffse if (!src.IsSimpleReg(EDX)) { jit_->MOV(32, R(EDX), src); } + if (!g_Config.bIgnoreBadMemAccess) { + jit_->MOV(32, M(&jit_->mips_->pc), Imm32(jit_->js.compilerPC)); + } // This is a special jit-ABI'd function. jit_->CALL(safeFunc); #ifdef _M_IX86 @@ -266,6 +269,9 @@ bool JitSafeMem::PrepareSlowRead(const void *safeFunc) jit_->AND(32, R(EAX), Imm32(alignMask_)); } + if (!g_Config.bIgnoreBadMemAccess) { + jit_->MOV(32, M(&jit_->mips_->pc), Imm32(jit_->js.compilerPC)); + } // This is a special jit-ABI'd function. jit_->CALL(safeFunc); needsCheck_ = true; @@ -297,6 +303,9 @@ void JitSafeMem::NextSlowRead(const void *safeFunc, int suboffset) jit_->AND(32, R(EAX), Imm32(alignMask_)); } + if (!g_Config.bIgnoreBadMemAccess) { + jit_->MOV(32, M(&jit_->mips_->pc), Imm32(jit_->js.compilerPC)); + } // This is a special jit-ABI'd function. jit_->CALL(safeFunc); } diff --git a/Core/MemMapFunctions.cpp b/Core/MemMapFunctions.cpp index 285ae2a5df..a2e92d9634 100644 --- a/Core/MemMapFunctions.cpp +++ b/Core/MemMapFunctions.cpp @@ -88,7 +88,8 @@ inline void ReadFromHardware(T &var, const u32 address) // More RAM (remasters, etc.) var = *((const T*)GetPointerUnchecked(address)); } else { - if (g_Config.bJit) { + // In jit, we only flush PC when bIgnoreBadMemAccess is off. + if (g_Config.bJit && g_Config.bIgnoreBadMemAccess) { WARN_LOG(MEMMAP, "ReadFromHardware: Invalid address %08x", address); } else { WARN_LOG(MEMMAP, "ReadFromHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]); @@ -124,7 +125,8 @@ inline void WriteToHardware(u32 address, const T data) // More RAM (remasters, etc.) *(T*)GetPointerUnchecked(address) = data; } else { - if (g_Config.bJit) { + // In jit, we only flush PC when bIgnoreBadMemAccess is off. + if (g_Config.bJit && g_Config.bIgnoreBadMemAccess) { WARN_LOG(MEMMAP, "WriteToHardware: Invalid address %08x", address); } else { WARN_LOG(MEMMAP, "WriteToHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);