diff --git a/Core/MIPS/x86/RegCacheFPU.cpp b/Core/MIPS/x86/RegCacheFPU.cpp
index dab9b032ec..3469487183 100644
--- a/Core/MIPS/x86/RegCacheFPU.cpp
+++ b/Core/MIPS/x86/RegCacheFPU.cpp
@@ -111,6 +111,18 @@ void FPURegCache::MapRegsV(const u8 *r, VectorSize sz, int flags) {
 	}
 }
 
+bool FPURegCache::IsMappedVS(u8 *r, VectorSize vsz) {
+	const int n = GetNumVectorElements(vsz);
+	if (!IsMappedVS(r[0]))
+		return false;
+	X64Reg xr = VSX(r[0]);
+	for (int i = 0; i < n; ++i) {
+		if (!IsMappedVS(r[i]) || VSX(r[i]) != xr)
+			return false;
+	}
+	return true;
+}
+
 void FPURegCache::MapRegsVS(const u8 *r, VectorSize vsz, int flags) {
 	const int n = GetNumVectorElements(vsz);
 	if (!TryMapRegsVS(r, vsz, flags)) {
diff --git a/Core/MIPS/x86/RegCacheFPU.h b/Core/MIPS/x86/RegCacheFPU.h
index b8ed0695dd..eb457b907c 100644
--- a/Core/MIPS/x86/RegCacheFPU.h
+++ b/Core/MIPS/x86/RegCacheFPU.h
@@ -162,6 +162,17 @@ public:
 	void ReleaseSpillLock(int mipsrega);
 	void ReleaseSpillLocks();
 
+	bool IsMapped(int r) {
+		return R(r).IsSimpleReg();
+	}
+	bool IsMappedV(int v) {
+		return vregs[v].lane == 0 && V(v).IsSimpleReg();
+	}
+	bool IsMappedVS(int v) {
+		return vregs[v].lane != 0 && VS(v).IsSimpleReg();
+	}
+	bool IsMappedVS(u8 *r, VectorSize vsz);
+
 	void MapRegV(int vreg, int flags);
 	void MapRegsV(int vec, VectorSize vsz, int flags);
 	void MapRegsV(const u8 *v, VectorSize vsz, int flags);