riscv: Implement vec4 shuffle and init.

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Unknown W. Brackets committed 2023-07-25 20:33:56 -07:00
1 parent 4e17c59cc2
commit 23e9dffc68
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@@ -55,6 +55,7 @@ void RiscVJit::CompIR_Basic(IRInst inst) {
FCVT(FConv::S, FConv::W, fpr.R(inst.dest), R_ZERO);
} else {
// TODO: In the future, could use FLI if it's approved.
// Also, is FCVT faster?
LI(SCRATCH1, (int32_t)inst.constant);
FMV(FMv::W, FMv::X, fpr.R(inst.dest), SCRATCH1);
}