From 0dc3e4e2db904750b73d9d25968f9fe449330262 Mon Sep 17 00:00:00 2001 From: "Unknown W. Brackets" Date: Sat, 17 Jan 2015 11:58:36 -0800 Subject: [PATCH] x86jit: Handle unable to spill better. Might as well check the result to be safe. --- Core/MIPS/x86/RegCacheFPU.cpp | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Core/MIPS/x86/RegCacheFPU.cpp b/Core/MIPS/x86/RegCacheFPU.cpp index f7a3229926..c3aa9e20d4 100644 --- a/Core/MIPS/x86/RegCacheFPU.cpp +++ b/Core/MIPS/x86/RegCacheFPU.cpp @@ -242,9 +242,13 @@ bool FPURegCache::TryMapRegsVS(const u8 *v, VectorSize vsz, int flags) { // Single is easy, just map normally but track as a SIMD reg. // This way V/VS can warn about improper usage properly. MapRegV(v[0], flags); + X64Reg vx = VX(v[0]); + if (vx == INVALID_REG) + return false; + vregs[v[0]].lane = 1; if ((flags & MAP_DIRTY) != 0) - xregs[VSX(v)].dirty = true; + xregs[vx].dirty = true; if ((flags & MAP_NOLOCK) == 0) SpillLockV(v, vsz); Invariant();