diff --git a/pcsx2/MMI.cpp b/pcsx2/MMI.cpp
index deae88e7ca..efb5516753 100644
--- a/pcsx2/MMI.cpp
+++ b/pcsx2/MMI.cpp
@@ -1002,6 +1002,7 @@ void QFSRV() {				// JayteeMaster: changed a bit to avoid screw up
 	if (!_Rd_) return;
 
 	u32 sa_amt = cpuRegs.sa;
+    DevCon.Warning("QFSRV %d", sa_amt);
 	if (sa_amt == 0) {
 		cpuRegs.GPR.r[_Rd_].UD[0] = cpuRegs.GPR.r[_Rt_].UD[0];
 		cpuRegs.GPR.r[_Rd_].UD[1] = cpuRegs.GPR.r[_Rt_].UD[1];
@@ -1011,7 +1012,12 @@ void QFSRV() {				// JayteeMaster: changed a bit to avoid screw up
 	} else {
 		//Console.WriteLn( "SA Properly Valued at: %d (after %d zeros)", sa_amt, saZero );
 		//saZero = 0;
-		if (sa_amt < 64) {
+		if (sa_amt == 0)
+		{
+            Rd.UD[0] = cpuRegs.GPR.r[_Rt_].UD[0] >> sa_amt;
+            Rd.UD[1] = cpuRegs.GPR.r[_Rt_].UD[1] >> sa_amt;
+            cpuRegs.GPR.r[_Rd_] = Rd;
+		} else if (sa_amt < 64) {
 			/*
 			cpuRegs.GPR.r[_Rd_].UD[0] = cpuRegs.GPR.r[_Rt_].UD[0] >> sa_amt;
 			cpuRegs.GPR.r[_Rd_].UD[1] = cpuRegs.GPR.r[_Rt_].UD[1] >> sa_amt;
diff --git a/pcsx2/R5900OpcodeImpl.cpp b/pcsx2/R5900OpcodeImpl.cpp
index b45ff2c1c6..e125a24b9c 100644
--- a/pcsx2/R5900OpcodeImpl.cpp
+++ b/pcsx2/R5900OpcodeImpl.cpp
@@ -1021,11 +1021,11 @@ void BREAK() {
 
 void MFSA() {
 	if (!_Rd_) return;
-	cpuRegs.GPR.r[_Rd_].SD[0] = (s64)cpuRegs.sa;
+    cpuRegs.GPR.r[_Rd_].UD[0] = (u64)cpuRegs.sa / 8;
 }
 
 void MTSA() {
-	cpuRegs.sa = (s32)cpuRegs.GPR.r[_Rs_].SD[0];
+	cpuRegs.sa = (u32)cpuRegs.GPR.r[_Rs_].UD[0] * 8;
 }
 
 // SNY supports three basic modes, two which synchronize memory accesses (related
diff --git a/pcsx2/x86/iR5900Misc.cpp b/pcsx2/x86/iR5900Misc.cpp
index f328099ab5..c39885f54f 100644
--- a/pcsx2/x86/iR5900Misc.cpp
+++ b/pcsx2/x86/iR5900Misc.cpp
@@ -96,10 +96,12 @@ void recMFSA()
 
 	mmreg = _checkXMMreg(XMMTYPE_GPRREG, _Rd_, MODE_WRITE);
 	if( mmreg >= 0 ) {
-		xMOVL.PS(xRegisterSSE(mmreg), ptr[&cpuRegs.sa]);
+        xMOVL.PS(xRegisterSSE(mmreg), ptr[&cpuRegs.sa]);
+        xPSRL.DQ(xRegisterSSE(mmreg), 3);
 	}
 	else {
 		xMOV(eax, ptr[&cpuRegs.sa]);
+        xSHR(eax, 3);
 		_deleteEEreg(_Rd_, 0);
 		xMOV(ptr[&cpuRegs.GPR.r[_Rd_].UL[0]], eax);
 		xMOV(ptr32[&cpuRegs.GPR.r[_Rd_].UL[1]], 0);
@@ -116,10 +118,13 @@ void recMTSA()
 		int mmreg;
 
 		if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, _Rs_, MODE_READ)) >= 0 ) {
+            xPSLL.DQ(xRegisterSSE(mmreg), 3);
 			xMOVSS(ptr[&cpuRegs.sa], xRegisterSSE(mmreg));
+            xPSRL.DQ(xRegisterSSE(mmreg), 3);
 		}
 		else {
 			xMOV(eax, ptr[&cpuRegs.GPR.r[_Rs_].UL[0]]);
+            xSHL(eax, 3);
 			xMOV(ptr[&cpuRegs.sa], eax);
 		}
 	}